Demo Data from EDBT 2026 / reviewers in the wild / expert
Dmitry Nedospasov
dblp:117/1766
· DBLP profile ↗
7ranked-venue papers
1as first author
0since 2021 · last 2017
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Security and privacy · 5 · 1 first-authorSystems, architecture and hardware · 2Software engineering, systems software and programming languages · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Network and information security
4 papers |
Hardware security and side channels · 97% Cryptographic primitives and cryptanalysis · 3% | |
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Integrated circuit design · 100% |
Topics — the 6 heaviest of 8, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Hardware security and side channels › hardware security primitives
physical unclonable function |
0.5 | 2 | 2017 | Photonic Side-Channel Analysis of Arbiter PUFs · J. Cryptol. 2017 Physical Characterization of Arbiter PUFs · CHES 2014 |
Hardware security and side channels
side-channel attack |
0.4 | 2 | 2017 | Photonic Side-Channel Analysis of Arbiter PUFs · J. Cryptol. 2017 Simple Photonic Emission Analysis of AES - Photonic Side Channel Analysis for the Rest of Us · CHES 2012 |
Hardware security and side channels › side-channel attack › physical side channel
optical side channel |
0.3 | 1 | 2017 | Photonic Side-Channel Analysis of Arbiter PUFs · J. Cryptol. 2017 |
Hardware security and side channels › hardware security primitives › physical unclonable function
arbiter PUF |
0.2 | 1 | 2014 | Physical Characterization of Arbiter PUFs · CHES 2014 |
Integrated circuit design
digital circuit design |
0.1 | 1 | 2014 | Physical Characterization of Arbiter PUFs · CHES 2014 |
Cryptographic primitives and cryptanalysis › block cipher
AES |
0.0 | 1 | 2012 | Simple Photonic Emission Analysis of AES - Photonic Side Channel Analysis for the Rest of Us · CHES 2012 |
Methods — techniques the papers use, named apart from their topics
physical characterization · 0.4photonic emission analysis · 0.3
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2017 | Photonic Side-Channel Analysis of Arbiter PUFs
Shahin Tajik, Enrico Dietz, Sven Frohmann, Helmar Dittrich, Dmitry Nedospasov, Clemens Helfmeier, Jean-Pierre Seifert, Christian Boit, Heinz-Wilhelm Hübers |
J. Cryptol. | 5 |
| 2014 | Physical Characterization of Arbiter PUFs
Shahin Tajik, Enrico Dietz, Sven Frohmann, Jean-Pierre Seifert, Dmitry Nedospasov, Clemens Helfmeier, Christian Boit, Helmar Dittrich |
CHES | 5 |
| 2014 | Physical vulnerabilities of Physically Unclonable FunctionsabstractIn recent years one of the most popular areas of research in hardware security has been Physically Unclonable Functions (PUF). PUFs provide primitives for implementing tamper detection, encryption and device fingerprinting. One particularly common application is replacing Non-volatile Memory (NVM) as key storage in embedded devices like smart cards and secure microcontrollers. Though a wide array of PUF have been demonstrated in the academic literature, vendors have only begun to roll out PUFs in their end-user products. Moreover, the improvement to overall system security provided by PUFs is still the subject of much debate. This work reviews the state of the art of PUFs in general, and as a replacement for key storage in particular. We review also techniques and methodologies which make the physical response characterization and physical/digital cloning of PUFs possible. Clemens Helfmeier, Christian Boit, Dmitry Nedospasov, Shahin Tajik, Jean-Pierre Seifert |
DATE | 3 |
| 2014 | Emission Analysis of Hardware ImplementationsabstractToday, hardware implementations are the basis for many security applications, such as cryptographic ciphers. Such applications are realized using complex combinatorial logic circuits of substantial size. Therefore, understanding the gate-level implementation can be crucial for the attacker. However, Hardware Description Language (HDL) behavioral models and gate-level net list are seldom available for a particular design. Executing software directly on the device to assist in understanding the implementation is one potential solution. However, this may either be infeasible or completely impossible in practice as target devices may be incapable of executing code. Currently, few works have proposed forms of dynamic gate-level analysis of the actual hardware implementations. Moreover, current reverse-engineering techniques based on physical delayering and optical imaging cannot be applied to programmable logic. In this work we present the first dynamic emission analysis of a hardware implementation. This technique does not require any prior knowledge about the target device. Furthermore, it does not require code to be executed by the target. Hardware implementations consist of basic primitives that form the building blocks of complex hardware functions. By individually analyzing each primitive and correlating the corresponding optical images, the emission fingerprint of each primitive can be identified. As a result the hardware implementation of the device can be reconstructed. We present practical results for a common Complex Programmable Logic Device (CPLD). However, the same approach can be applied to hardware implementations in general. Shahin Tajik, Dmitry Nedospasov, Clemens Helfmeier, Jean-Pierre Seifert, Christian Boit |
DSD | 2 |
| 2013 | Breaking and entering through the siliconabstractAs the surplus market of failure analysis equipment continues to grow, the cost of performing invasive IC analysis continues to diminish. Hardware vendors in high-security applications utilize security by obscurity to implement layers of protection on their devices. High-security applications must assume that the attacker is skillful, well-equipped and well-funded. Modern security ICs are designed to make readout of decrypted data and changes to security configuration of the device impossible. Countermeasures such as meshes and attack sensors thwart many state of the art attacks. Because of the perceived difficulty and lack of publicly known attacks, the IC backside has largely been ignored by the security community. However, the backside is currently the weakest link in modern ICs because no devices currently on the market are protected against fully-invasive attacks through the IC backside. Fully-invasive backside attacks circumvent all known countermeasures utilized by modern implementations. In this work, we demonstrate the first two practical fully-invasive attacks against the IC backside. Our first attack is fully-invasive backside microprobing. Using this attack we were able to capture decrypted data directly from the data bus of the target IC's CPU core. We also present a fully invasive backside circuit edit. With this attack we were able to set security and configuration fuses of the device to arbitrary values. Clemens Helfmeier, Dmitry Nedospasov, Christopher Tarnovsky, Starbug, Christian Boit, Jean-Pierre Seifert |
CCS | 2 |
| 2013 | Invasive PUF AnalysisabstractIn this work we consider the suitability of Phyiscaly Unclonable Functions (PUFs) for high-security applications. For PUFs to be considered secure in such scenarios they must be resilient to both semi-invasive and fully-invasive attacks. We introduce a new failure analysis technique for semi-invasive, single-trace, backside readout of logic states. We apply this technique to characterize the unique physical response of a memory-based PUF. With these results we identify several weakness in current PUF schemes. We extend current PUF definitions to be resilient against such attacks by requiring that PUFs be implemented in a serialized manner. Finally, we improve already existing PUF architectures to include these concepts. Dmitry Nedospasov, Jean-Pierre Seifert, Clemens Helfmeier, Christian Boit |
FDTC | 1 |
| 2012 | Simple Photonic Emission Analysis of AES - Photonic Side Channel Analysis for the Rest of Us
Alexander Schlösser, Dmitry Nedospasov, Juliane Krämer, Susanna Orlic, Jean-Pierre Seifert |
CHES | 2 |