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Lazar Stricevic

dblp:117/4633 · DBLP profile ↗
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1ranked-venue papers
0as first author
1since 2021 · last 2023
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 since 2021Software engineering, systems software and programming languages · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Memory systems · 67% Distributed systems · 33%
Software engineering, system software, and programming languages
1 paper
Compilers and program optimization · 100%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Distributed systems
code migration
0.712023
AtoMig: Automatically Migrating Millions Lines of Code from TSO to WMM · ASPLOS (2) 2023
Memory systems › memory consistency
memory consistency model
0.712023
AtoMig: Automatically Migrating Millions Lines of Code from TSO to WMM · ASPLOS (2) 2023
Memory systems › memory consistency › memory consistency model
weak memory model
0.712023
AtoMig: Automatically Migrating Millions Lines of Code from TSO to WMM · ASPLOS (2) 2023
Compilers and program optimization
program transformation
0.212023
AtoMig: Automatically Migrating Millions Lines of Code from TSO to WMM · ASPLOS (2) 2023
Compilers and program optimization
synchronization insertion
0.212023
AtoMig: Automatically Migrating Millions Lines of Code from TSO to WMM · ASPLOS (2) 2023

Methods — techniques the papers use, named apart from their topics

synchronization insertion · 1.3static analysis · 1.3
YearPublicationVenuePosition
2023 AtoMig: Automatically Migrating Millions Lines of Code from TSO to WMM
abstract
CPUs with weak memory-consistency models (WMMs), such as Arm and RISC-V, are rapidly increasing their market share. Porting legacy x86 applications to such CPUs requires introducing extra synchronization to prevent WMM-related concurrency bugs---a task often left to human experts.
Martin Beck, Koustubha Bhat, Lazar Stricevic, Diogo Behrens, Ming Fu, Viktor Vafeiadis, Haibo Chen 0001, Hermann Härtig
ASPLOS (2)3