Virtual reality (VR) gaming offers uniquely immersive experiences but poses challenges due to its complexity and novelty. This study explores how both hedonic (e.g., immersion, presence) and pragmatic (e.g., discomfort, control) user experience (UX) dimensions affect user satisfaction. Using over 350,000 Steam.com reviews, we developed a new sentiment analysis method combining zero-shot classification and a fine-tuned RoBERTa model. Results show all UX dimensions are positively linked to satisfaction, but their impact varies by gaming experience of users. General gaming experience strengthens the effect of hedonic dimensions, while game-specific experience diminishes the effect of all UX dimensions. Moreover, users with general experience mention all UX dimensions more frequently, whereas those with game-specific experience emphasize hedonic over pragmatic aspects. These findings reveal how different types of gaming experience shape the perception and evaluation of VR UX.

Internet censors often rely on information in the first few packets of a connection to censor unwanted traffic. With the rise of the QUIC transport protocol, prior work has suggested the method of using QUIC connection migration to conceal the first few handshake packets using a different network path (e.g., an encrypted proxy channel). However, the use of connection migration for censorship circumvention has not been explored or validated in terms of feasibility or performance. We bridge this gap by providing a rigorous quantitative evaluation of this approach that we name QUICstep. We develop a lightweight, application-agnostic prototype of QUICstep and demonstrate that QUICstep is able to circumvent a real-world QUIC SNI censor. We find that not only does QUICstep outperform a fully encrypted channel in diverse settings, but also that it can significantly reduce traffic load for encrypted channel providers. We also propose using QUICstep as a tool for measuring QUIC connection migration support in the wild and show that support for connection migration is on the rise. While as of now QUIC and connection migration support is limited, we envision that QUICstep can be a useful tool for the future where QUIC is the de facto norm for the Internet.

In frequency-modulated continuous-wave (FMCW) light detection and ranging (LiDAR) systems, frequency modulation (FM) linearity and continuous-wave (CW) demodulation are the key factors determining overall performance. While most prior works focused on CPU-based linearization and decoding, this study presents a real-time FMCW architecture optimized for autonomous systems. While the system utilizes a generally robust distributed feedback (DFB) laser-based transmitter, it can be susceptible to temperature-induced frequency drift in dynamic autonomous environments. To address these fluctuations, an existing kernel-based nonlinearity tracking method was adopted and further extended into a coarse-to-fine framework for wide-range operation. The main design focus lies in the receiver, which includes a custom analog front-end (AFE) optimized for analog-to-digital converter (ADC) interfacing and multiply-accumulate (MAC) operations, along with a hardware-description-language (HDL)-based real-time decoding process. Experimental results in free space achieved a 0.15% error rate and 0.48-mm STD at 2 m, demonstrating the feasibility of the proposed architecture. In addition, an intensity measurement was conducted to verify the AFE performance.

Recently, open-source large Vision-Language Models (VLMs) have progressed toward achieving performance comparable to closed-source VLMs. However, open-source VLMs struggle to recognize unfamiliar texts depicted in the images, where the texts are written in underrepresented languages like Korean. This illiteracy problem is primarily due to insufficient training data for the underrepresented languages. To address this problem, we propose a novel augmentation scheme that generates large-scale image data for the underrepresented languages with minimal manual annotations. Our scheme synthetically combines a text image depicting words or sentences with a template image containing textual contexts, such as a receipt, a sign, a book, and a product label. Specifically, the text image is cut and pasted into a patch of the template image to generate a synthetic image, which is labeled with the corresponding texts in the text image. Therefore, fine-tuning a VLM with our synthetic data can enhance its ability to generalize to real-world text recognition tasks. Experimental results demonstrate the effectiveness of our scheme, showing a significant performance improvement in text recognition.

This brief introduces an in-memory computing (IMC) architecture utilizing a novel analog pop-count circuit based on the one-capacitor-one-nanoelectromechanical (NEM) memory switch device (1C-1N) structure, which performs XNOR and pop-count operations for binary neural networks (BNNs). The NEM memory switch device is a non-volatile memory (NVM) device capable of performing logic-in-memory operations such as XNOR operation. The analog pop-count circuit functions as a readout circuit for the NEM memory switch, reusing the 1C-1N structure as a capacitor digital-to-analog converter. The proposed 1C-1N device and the analog pop-count circuit are simulated using 28-nm CMOS technology. The results show that the 1C-1N device consumes an extremely low read power of 1-fJ/bit and the overall scheme utilizing the analog pop-count circuit, achieves 448.8 TOPS/W while achieving 49.5-% less area than using an analog-to-digital converter (ADC).

Vision Transformer ($V$iT) has gained prominence for its performance in various vision tasks but comes with considerable computational and memory demands, posing a challenge when deploying it on resource-constrained edge devices. To address this limitation, various token pruning methods have been proposed to reduce the computation. However, the majority of token pruning techniques do not account for practical use in actual embedded devices, which demand a significant reduction in computational load. In this paper, we introduce ViT-ToGo, a$V$iT accelerator with grouped token pruning. This enables the parallel execution of the$V$iT models and the token pruning process. We implement grouped token pruning with a head-wise importance estimator which simplifies the process need for token pruning, including sorting and reordering. Our proposed method achieves up to 66 % reduction in the number of tokens, resulting in up to 36% reduction in GFLOPs, with only a minimal accuracy drop of around 1 %. Furthermore, the hardware implementation incurs a marginal resource overhead of 1.13% in average.

Network-on-chip (NoC) architectures are emerged as a promising solution to the lack of scalability in multiprocessor systems-on-chips (MPSoCs). In this paper, we propose a novel BMNoC configuration algorithm together with simulation results. Our BMNoC configuration algorithm analyses the data traffic of the target application and determines which core is the right one to put into the certain cluster with its communication volume and locality. Furthermore, the simulation results illustrate the better latency than earlier studies and feasibility of BMNoC.