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Vieri Vanghi

dblp:119/4763 · DBLP profile ↗
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9ranked-venue papers
3as first author
0since 2021 · last 2007
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 4 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer networks
2 papers
Physical-layer communications · 100%

Topics — the 8 heaviest of 8, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Physical-layer communications › synchronization › carrier recovery
carrier phase estimation
0.011995
Performance analysis of decision-directed maximum-likelihood phase estimators for M-PSK modulated signals · IEEE Trans. Commun. 1995
Physical-layer communications
synchronization
0.011995
Performance analysis of decision-directed maximum-likelihood phase estimators for M-PSK modulated signals · IEEE Trans. Commun. 1995
Physical-layer communications › synchronization
carrier and timing synchronization
0.011994
Analysis of an all-digital maximum likelihood carrier phase and clock timing synchronizer for eight phase-shift keying modulation · IEEE Trans. Commun. 1994
Physical-layer communications › channel estimation
maximum likelihood estimation
0.011994
Analysis of an all-digital maximum likelihood carrier phase and clock timing synchronizer for eight phase-shift keying modulation · IEEE Trans. Commun. 1994
Physical-layer communications › synchronization
timing recovery
0.011994
Analysis of an all-digital maximum likelihood carrier phase and clock timing synchronizer for eight phase-shift keying modulation · IEEE Trans. Commun. 1994
Physical-layer communications
modulation
0.021995
Performance analysis of decision-directed maximum-likelihood phase estimators for M-PSK modulated signals · IEEE Trans. Commun. 1995
Analysis of an all-digital maximum likelihood carrier phase and clock timing synchronizer for eight phase-shift keying modulation · IEEE Trans. Commun. 1994
Physical-layer communications › modulation › phase-shift keying
MPSK
0.011995
Performance analysis of decision-directed maximum-likelihood phase estimators for M-PSK modulated signals · IEEE Trans. Commun. 1995
Physical-layer communications › modulation
phase-shift keying
0.011994
Analysis of an all-digital maximum likelihood carrier phase and clock timing synchronizer for eight phase-shift keying modulation · IEEE Trans. Commun. 1994

Methods — techniques the papers use, named apart from their topics

analytical modeling · 0.0monte carlo simulation · 0.0decision-directed estimation · 0.0cramer-rao bound · 0.0
YearPublicationVenuePosition
2007 Frequency Coordination Between UMTS and GSM Systems at 900 MHZ
abstract
UTRA-FDD requirements for operation in the 900 MHz band have been recently standardized in 3 GPP paving the way for refarming of GSM spectrum to UMTS. UMTS900 networks will have to co-exist with GSM900 networks for some time. 3GPP (2005) has studied co-existence issues and has concluded that GSM900 and UMTS900 can co-exist in both coordinated and un-coordinated deployments in which the UMTS900 carrier is allocated 5 MHz in addition to a guard-band equal to 1 GSM channel (200 KHz) on each side. However, in some deployments the operator may not have sufficient available GSM spectrum to allow the GSM traffic to be offloaded from the spectrum allocated to UMTS900 to the remaining GSM spectrum. Hence of interest is to assess system performance under much more stringent spectrum clearing assumptions. Here we characterize transmitter and receiver performance based on lab tests conducted on commercial equipment, both UMTS900 and GSM900 terminals and base stations. From such measurements we assess the impact of mutual interference, GSM MS with UMTS NodeB and UMTS UE with GSM BTS, on receiver performance as a function of frequency offset and coupling loss between interfering transmitter and offended receiver. We show that the limiting factor is the interference caused by the GSM MS to the UMTS Node B, and that as little as 4.2 MHz of GSM spectrum can be cleared and allocated to one UMTS carrier with satisfactory system performance.
Vieri Vanghi, Mustafa Saglam, Jiang Jindi
PIMRC1
2004 WCDMA handover parameters optimization
abstract
WCDMA soft handover is assisted by mobile station's measurements of the monitored and active set cells' quality. The rules for measurement reporting are based on thresholds whose computation depends on many parameters. The setting of parameters greatly affects handover, performance and downlink capacity consumption. In this paper, handover parameters are optimized using field measurements. Field measurements are fed into a S/W emulator mimicking mobile and base station operation under different settings of handover parameters. Parameters are optimized in terms of their effect on mean active set size, captured power, and rate of occurrence of handover events.
Vieri Vanghi, Christophe Chevallier
ICC1
2003 Performance of WCDMA downlink access and paging indicators in multipath Rayleigh fading channels
abstract
In WCDMA [3 GPP G. T. 25.211, 1990], downlink channel indicators are used in a variety of procedures related to access and paging. A binary indicator is sent on the paging indicator channel (PICH) in a mobile station (MS) is paged. A ternary indicator is sent on the access indicator channel (AICH) when the MS attempts to access the network. While underlying motivations for using paging and access indicators are different, they both share same key performance aspects: detection reliability at the cell edge and downlink capacity consumption. This paper details a framework for PICH and AICH performance analysis. Results are derived that are of practical interest to the network operator for downlink transmit power budgeting.
Vieri Vanghi, Sandip Sarkar
PIMRC1
2002 Comparative forward link traffic channel performance evaluation of HDR and 1XTREME systems
abstract
This paper presents a comparison of the forward link performance of the HDR and 1XTREME systems. Both systems have been proposed as possible evolutionary paths for the 1.25 MHz cdma2000 system, and have been designed to enable high data rate packet transmission. Link-level performance is evaluated by chip-level time-domain simulation of the forward data traffic channel in the presence of additive white Gaussian noise, and is then used in a system-level simulator modeling a network of 19 three-sector cells. The system-level simulator accounts for slow and fast fading and two types of multipath channel profiles, as described by the pedestrian A and vehicular B ITU-R channel models. The packet scheduling is performed using a proportionally fair (PF) scheduler. The systems use bit rate adaptation and hybrid ARQ to achieve 1% packet error rate (PER). All users in the system are assumed to always have data packets available for transmission. System performance is evaluated for an embedded sector in terms of average sector throughput as a function of the number of users, distributions of data rates, and individual throughputs over a set of users. Results show the benefits of multiuser diversity exploited by the PF scheduler, and present throughput and fairness comparisons for the two systems.
Carlos H. Rentel, Witold A. Krzymien, Bahman Darian, Vieri Vanghi, Robert C. Elliott
VTC Spring4
2002 HDR (1×EV-DO) reverse link throughput with fast rate control
abstract
In this paper we investigate the HDR CDMA system reverse link data channel throughput and obtain both an upper bound, which is derived from the pole capacity, and more practical results applicable when considering variable rate transmission with probabilistic flow control. From the analytical derivation of the pole capacity, a simple but effective rate control algorithm is devised that maintains the reverse link outage probability below a desired level while attempting at maximizing the reverse link utilization. The pole capacity accounts for the various overhead channels, and their effect on capacity is assessed. Simulations are then used to estimate reverse link throughput using the proposed rate control algorithm for both a single-cell and multi-cell scenarios. The effect of bursty traffic typical of non-streaming applications is also investigated. The results obtained not only provide a realistic estimate of the reverse link throughput, but also an insight into the effect of overhead, probabilistic flow control, and bursty traffic on the HDR reverse link throughput.
Seong-Jun Oh, Vieri Vanghi
WCNC2
2001 IS-2000 enhanced closed loop power control for turbo coding
abstract
We propose a novel enhanced closed loop power control scheme applicable to turbo coded packet data transmission. The scheme includes an adaptive outer loop and an outer-outer loop. The outer loop mechanism sets the target signal-to-noise ratio (SNR) for the inner loop so that iterative decoding of the turbo codes is completed after a target number of iterations. The target number of iterations is set by the outer-outer loop so that the desired frame error rate (FER) is achieved. The proposed scheme is directly applicable to code division multiple access (CDMA) mobile stations supporting the IS-2000 standard while operating a forward supplemental channel (F-SCH) with turbo codes.
Aleksandar Damnjanovic, Vieri Vanghi
VTC Fall2
2001 Allocation of Walsh codes and quasi-orthogonal functions in cdma2000 forward link
abstract
In this paper, we investigate the code allocation problem of forward link channelization, i.e., allocation of Walsh codes and quasi-orthogonal functions (QOF's) in cdma2000 systems. Given multipath power profiles, geometry factors, and allocated codes of mobile stations (MSs), we propose a simple solution for the total sector transmit power. It is shown that the sector transmit power can be expressed in terms of a single variable, namely, the lumped geometry factor (LGF), which accounts for MS geometry factors, code channel activities, and cross-correlations among all the allocated codes. The formula is used to devise a code allocation algorithm that is proven optimum in the sense of maximizing capacity, under the condition of single-path channels.
Shiauhe Tsai, Farideh Khaleghi, Seong-Jun Oh, Vieri Vanghi
VTC Fall4
1995 Performance analysis of decision-directed maximum-likelihood phase estimators for M-PSK modulated signals
abstract
We investigate performance of decision-directed maximum-likelihood carrier phase synchronizers for M-PSK signalling (M/spl les/8) on the AWGN channel. Decision-directed feedback (DD-FB) and feedforward decision feedback (FF-DFB) structures are analyzed and compared in detail. A new, accurate model for the FF-DFB synchronizer is presented. Open loop characteristics and closed loop performance, in terms of steady-state jitter and cycle slip rate, are presented in the same framework for both the DD-FB and FF-DFB synchronizers. Performance comparison between the two phase estimator architectures is finally made for each modulation scheme investigated.
Riccardo De Gaudenzi, Tobias Garde, Vieri Vanghi
IEEE Trans. Commun.3
1994 Analysis of an all-digital maximum likelihood carrier phase and clock timing synchronizer for eight phase-shift keying modulation
abstract
An all-digital trellis-coded 8PSK (TC-8PSK) demodulator well suited for VLSI implementation, including maximum likelihood estimation decision-directed (MLE-DD) carrier phase and clock timing recovery, is introduced and analysed. By simply removing the trellis decoder the demodulator can efficiently cope with uncoded 8PSK signals. The proposed MLE-DD synchronisation algorithm requires one sample for the phase and two samples per symbol for the timing loop. The joint phase and timing discriminator characteristics are analytically derived and numerical results checked by means of computer simulations. An approximated expression for steady-state carrier phase and clock timing mean square error has been derived and successfully checked with simulation findings. Synchronizer deviation from the Cramer Rao bound is also discussed. Mean acquisition time for the digital synchronizer has also been computed and checked, using the Monte Carlo simulation technique. Finally TC-8PSK digital demodulator performance in terms of bit error rate and mean time to lose lock, including digital interpolators and synchronization loops, is presented.>
Riccardo De Gaudenzi, Vieri Vanghi
IEEE Trans. Commun.2