The HP-PA instruction set allows any arithmetic instruction to conditionally skip the following instruction based on the result of the arithmetic calculation. We have isolated this architectural feature and measured its performance benefit on a set of SPEC benchmark programs. Results indicate that adding the ability to skip to arithmetic instructions yields only a marginal performance benefit (less than 0.3%) for floating point intensive programs. For integer programs, however, the average benefit is between 0.6 and 2.8%. Most of this benefit comes from using arithmetic nullification with the COMICLR and COMCLR instructions. Our results assume a scalar processor, and therefore provide a lower bound on the performance benefit for more aggressive implementations.

This paper reviews past attempts to systematize in-struction set design and offers an alternative approach. Our technique is based on compaction of microopera-tions to form instructions. The compaction is done in such a way as to optimize a metric which is a function of cycle count, code size, and instruction set size. To illus-trate our technique, optimal instruction sets are derived for data structure creation in Prolog. 1

Most Prolog machines have been based on specialized architectures. Our goal is to start with a general purpose architecture and determine a minimal set of extensions for high performance Prolog execution. We have developed both the architecture and optimizing compiler simultaneously, drawing on results of previous implementations. We find that most Prolog specific operations can be done satisfactorily in software; however, there is a crucial set of features that the architecture must support to achieve the best Prolog performance. The emphasis of this paper is on our architecture and instruction set. The costs and benefits of the special architectural features and instructions are analyzed. Simulated performance results are presented and indicate a peak compiled Prolog performance of 3.68 million logical inferences per second.