In the development of human-centric systems, access to a large number of human information signals is required. Such signals can be acquired from both ambient and on-person (wearable) sensors. Large-area electronics (LAE) provide distinct capabilities for creating the required diverse, distributed and conformal sensors. However, the large volume of and complex correlation to target information within the captured data requires significant processing and inference. This makes an LAE-CMOS hybrid system well-suited to such applications. Interfacing between the two technologies is a challenge in hybrid system design. We demonstrate an emerging solution space based on information-processing-oriented interfaces, through two case studies: 1) an image sensing and compression system based on random projection [1]; 2) an electroencephalogram (EEG) acquisition and biomarker-extraction system using compressive-sensing circuits [2].

Large-Area Electronics (LAE) technology has enabled the development of physically-expansive sensing systems with a flexible form-factor, including large-aperture microphone arrays. We propose an approach to blind source separation based on leveraging such an array. In our algorithm we carry out delay-sum beamforming, but use frequency-dependent time delays, making it well-suited for a practical reverberant room. This is followed by a binary mask stage for further interference cancellation. A key feature is that it is fully "blind", since it requires no prior information about the location of the speakers or microphones. Instead, we carry out k-means cluster analysis, to estimate time delays in the background from acquired audio signals that represent the mixture of simultaneous sources. We have tested this algorithm in a conference room (T60 = 350 ms), using two linear arrays consisting of: (1) commercial electret capsules, and (2) LAE microphones, fabricated in-house. We have achieved high-quality separation results, obtaining a mean PESQ MOS improvement (relative to the unprocessed signal) for the electret array of 0.7 for two sources and 0.6 for four simultaneous sources, and for the LAE array of 0.5 and 0.3, respectively.

Hybrid large-area systems aim to leverage the strengths of two complementary technologies: (1) large-area electronics (LAE), which enables dense arrays of diverse transducers on substrates that can be large and flexible; and (2) silicon CMOS ICs, which enable efficient and high-performance instrumentation, computation, and power management. A key challenge in realizing these hybrid systems on a large-scale lies in the interfacing required between the two technologies. We describe methods to ease the interfacing, enabled by device, circuit, and algorithmic advances, thereby suggesting a range of challenges and opportunities that are exposed when thinking about systems.

Hybrid systems combine Large-Area Electronics (LAE) with high-performance technologies (e.g., silicon CMOS) [1]. With architectural concepts for hybrid systems broadening to match the range of emerging applications, this paper examines modular approaches for multi-sheet, multi-technology integration. It identifies the interfaces required as a critical backbone. For interfaces associated with various system functionalities (sensing, processing, powering), specific approaches are surveyed and analyzed, taking from insights derived from several previous experimental demonstrations of complete hybrid systems.

By enabling diverse and large-scale transducers, large-area electronics raises the potential for electronic systems to interact much more extensively with the physical world than is possible today. This can substantially expand the scope of applications, both in number and in value. But first, translation into applications requires a base of system functions (instrumentation, computation, power management, communication). These cannot be realized on the desired scale by large-area electronics alone. It is necessary to combine large-area electronics with high-performance, high-efficiency technologies, such as crystalline silicon CMOS, within hybrid systems. Scalable hybrid systems require rethinking the subsystem architectures from the start by considering how the technologies should be interfaced, on both a functional and physical level. To explore platform architectures along with the supporting circuits and devices, we consider as an application driver, a self-powered sheet for high-resolution structural health monitoring (of bridges and buildings). Top-down evaluation of design alternatives within the hybrid design space and pursuit of template architectures exposes circuit functions and device optimizations traditionally overlooked by bottom-up approaches alone.