Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Helmuth Brügel

dblp:120/6669 · DBLP profile ↗
← Back
1ranked-venue papers
1as first author
0since 2021 · last 1994
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer networks
1 paper
Physical-layer communications · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Physical-layer communications › synchronization
bit synchronization
0.011994
Variable bandwidth DPLL bit synchronizer with rapid acquisition implemented as a finite state machine · IEEE Trans. Commun. 1994
Physical-layer communications › synchronization › phase-locked loop
digital phase-locked loop
0.011994
Variable bandwidth DPLL bit synchronizer with rapid acquisition implemented as a finite state machine · IEEE Trans. Commun. 1994
Physical-layer communications
synchronization
0.011994
Variable bandwidth DPLL bit synchronizer with rapid acquisition implemented as a finite state machine · IEEE Trans. Commun. 1994
Physical-layer communications › synchronization
timing recovery
0.011994
Variable bandwidth DPLL bit synchronizer with rapid acquisition implemented as a finite state machine · IEEE Trans. Commun. 1994

Methods — techniques the papers use, named apart from their topics

simulation · 0.0markov chain analysis · 0.0
YearPublicationVenuePosition
1994 Variable bandwidth DPLL bit synchronizer with rapid acquisition implemented as a finite state machine
abstract
A digital PLL bit synchronizer with variable loop bandwidth for rapid acquisition and good tracking performance is proposed, and its performance analyzed using Markov chain techniques. Results are presented for the distributions of acquisition time and time to first bit slip in terms of state transition probabilities. For burst mode data, results for the timing error and bit error rate as a function of the preamble bit number are obtained. All results are evaluated by repeated matrix products and verified by simulation. Comparison of the variable bandwidth DPLL to a fixed bandwidth DPLL shows significantly faster acquisition for a given tracking performance.>
Helmuth Brügel, Peter F. Driessen
IEEE Trans. Commun.1