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Yamei Feng

dblp:121/5572 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2012
—ORCID · unresolved

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 77% Integrated circuit design · 23%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › timing analysis › statistical timing analysis
statistical timing and yield analysis
0.112012
Efficient SRAM Failure Rate Prediction via Gibbs Sampling · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2012
Integrated circuit design › memory circuit design
SRAM cell design
0.012012
Efficient SRAM Failure Rate Prediction via Gibbs Sampling · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2012

Methods — techniques the papers use, named apart from their topics

monte carlo simulation · 0.1importance sampling · 0.1gibbs sampling · 0.1
YearPublicationVenuePosition
2012 Efficient SRAM Failure Rate Prediction via Gibbs Sampling
abstract
Statistical analysis of SRAM has emerged as a challenging issue because the failure rate of SRAM cells is extremely small. In this paper, we develop an efficient importance sampling algorithm to capture the rare failure event of SRAM cells. In particular, we adapt the Gibbs sampling technique from the statistics community to find the optimal probability distribution for importance sampling with a low computational cost (i.e., a small number of transistor-level simulations). The proposed Gibbs sampling method applies an integrated optimization engine to adaptively explore the failure region in a Cartesian or spherical coordinate system by sampling a sequence of 1-D probability distributions. Several implementation issues such as 1-D random sampling and starting point selection are carefully studied to make the Gibbs sampling method efficient and accurate for SRAM failure rate prediction. Our experimental results of a 90 nm SRAM cell demonstrate that the proposed Gibbs sampling method achieves 1.4-4.9× runtime speedup over other state-of-the-art techniques when a high prediction accuracy is required (e.g., the relative error defined by the 99% confidence interval reaches 5%). In addition, we further demonstrate an important example for which the proposed Gibbs sampling algorithm accurately estimates the correct failure probability, while the traditional techniques fail to work.
Shupeng Sun, Yamei Feng, Changdao Dong, Xin Li 0001
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2