Demonstration venue · read-only. Every page can be browsed; the buttons that would change it are switched off. Create an account to run TaxoReview on your own data. A simulation from public publication records: the people listed were not invited and did not agree to review.
? Tutorial for this page

Sang-yeop Lee

dblp:121/9561 · DBLP profile ↗
← Back
4ranked-venue papers
0as first author
1since 2021 · last 2026
—ORCID · unresolved

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3Applied, interdisciplinary, general and emerging computing · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Interdisciplinary, comprehensive, and emerging computing
1 paper
Bioinformatics and computational biology · 100%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Bioinformatics and computational biology › structural biology
NMR spectroscopy
1.012026
ONEST: a web-based platform for the rapid and robust analysis of protein excited states through CEST spectroscopy · Bioinform. 2026
Bioinformatics and computational biology
protein dynamics
1.012026
ONEST: a web-based platform for the rapid and robust analysis of protein excited states through CEST spectroscopy · Bioinform. 2026

Methods — techniques the papers use, named apart from their topics

multi-field fitting · 1.0analytical two-state exchange model · 1.0
YearPublicationVenuePosition
2026 ONEST: a web-based platform for the rapid and robust analysis of protein excited states through CEST spectroscopy
abstract
SUMMARY: The biological function of proteins is often driven by "invisible" excited states-transient, low-population conformations that remain undetectable by conventional structural methods. Chemical Exchange Saturation Transfer (CEST) NMR spectroscopy is a powerful technique for characterizing these states; however, the complexity of data analysis and the computational cost of numerical fitting have hindered its widespread adoption. To address these challenges, we present ONEST (Optimized Novel Exchange Saturation Transfer), a user-friendly web server designed to automate and accelerate CEST analysis. ONEST utilizes a simultaneous multi-field fitting algorithm that leverages exact analytical solutions for two-state exchange (Baldwin model) rather than computationally intensive numerical integration. This approach incorporates a rigorous correction for radio-frequency (RF) field inhomogeneity and resolves parameter degeneracy by jointly fitting datasets acquired at distinct RF field strengths. Validation against synthetic datasets yielded reduced c2 values near unity (∼1.05), confirming that the analytical approach recovers kinetic parameters with accuracy comparable to full Bloch-McConnell simulations but at a fraction of the computational cost. Furthermore, application to the anti-HIV lectin OAA successfully characterized slow conformational exchange (kex = 279 s-1) involving a minor population of 3%. By streamlining the extraction of kinetic and thermodynamic parameters, ONEST significantly lowers the technical barrier to entry, enabling a broader range of researchers to investigate protein dynamics at atomic resolution. CONTACT: [email protected]. AVAILABILITY AND IMPLEMENTATION: ONEST is available through the web server at http://onest.ai.kr.
Joonhyeok Choi, Sang-yeop Lee, Kyungdoe Han, Marta G. Carneiro, Kyoung-Seok Ryu
Bioinform.2
2015 A 0.5-V 5.8-GHz low-power asymmetrical QPSK/OOK transceiver for wireless sensor network
abstract
This paper presents design of the low power RF transceiver [1] which is suitable for wireless sensor network. Using 5.8GHz band has potentiality to achieve small size wireless sensor module because of smaller antenna in higher frequency. The proposed transceiver utilizes different modulation schemes for uplink and downlink to optimize power consumption and spectral efficiency. In addition, supply voltage of 0.5V can reduce the power consumption of overall RF transceiver. The prototype transceiver was fabricated in 65nm CMOS process, and the transmitter achieved EVM of 12.6% while consuming 2.86mW, and the receiver realizes sensitivity of -75dBm while consuming 0.83mW.
Sho Ikeda, Sang-yeop Lee, Shin Yonezawa, Motohiro Takayasu, Taisuke Hamada, Yosuke Ishikawa, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu
ASP-DAC2
2015 A 0.5-V 1.56-mW 5.5-GHz RF transceiver IC module with J-shaped folded monopole antenna
abstract
This paper presents a low-power RF-CMOS-transceiver IC-module with small antennas on a printed circuit board (PCB). Active mixer-first architecture is employed on a receiver for achieving both acceptable sensitivity and lower power. We also show strategies for lowering power consumption of the transmitter and the phase locked loop (PLL): a high-gain inverter-based resonant-driver and a current-reuse voltage controlled oscillator (VCO). Power saving of the RF circuits is achieved with low supply-voltage design under 0.5V by exploiting forward body bias technique. The use of 5.5-GHz band and a J-shaped folded monopole antennas (JFMA) on the PCB enable to reduce the module footprint, and the module size of 0.78 cc is realized. The proposed transceiver circuit is fabricated in 65 nm CMOS process technology and is mounted on the PCB. 5.5-GHz RF-transceiver operation is succeeded with small power consumption of 1.56 mW under 0.5-V power supply. Output signal-power of the transmitter is −23.2 dBm, and receiver sensitivity is −61.2 dBm.
Yosuke Ishikawa, Sang-yeop Lee, Shin Yonezawa, Sho Ikeda, Taisuke Hamada, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu
ISCAS2
2014 A 950μW 5.5-GHz low voltage PLL with digitally-calibrated ILFD and linearized varactor
abstract
This paper proposes an ultra-low-power 5.5-GHz PLL which employs a divide-by-4 injection-locked frequency divider (ILFD), which is calibrated by digital circuits, and linearity-compensated varactors for low supply-voltage operation. The proposed PLL was fabricated in 65nm CMOS. It shows a 1-MHz-offset phase noise of -106 dBc/Hz and the total power consumption of 950μW at 5.5 GHz.
Sho Ikeda, Tatsuya Kamimura, Sang-yeop Lee, Hiroyuki Ito, Noboru Ishihara, Kazuya Masu
ASP-DAC3