The effect of the signal transition variation, due to the signal transition density, data asymmetry, and sinusoidal modulation, on the performance of the data transition tracking loop (DTTL) symbol synchronizer is addressed. These factors will affect the DTTL performance, such as the clock jitter and the cycle slippage rate, and unnecessary system loss may result if the system parameters are not well selected. Given the background of C. S. Tsang and W. C. Lindsey (1986), this result can serve as an engineering design guideline for the DTTL in the context of the signal transition variation.>

The error probability for MPSK detection is expressed here as a sum of a familiar upper-bound approximation and a correction term which is well suited for numerical integration. An asymptotic expansion of the correction term is derived, from which simple and extremely tight upper and lower bounds are obtained. Relative errors in using these bounds and approximations of them are graphed for cases of practical interest.

Approximate results are derived from a new expression for the mean time-to-first-slip for a first-order loop with arbitrary periodic equivalent phase detector characteristic in the presence of frequency detuning. They are accurate for loop signal-to-noise ratios greater than 3 dB or less than 0 dB. The approximations found serve to provide insight into the mean first slip time dependence on the shape of the equivalent phase detector characteristic and the frequency detuning, and dependence on loop parameters. The new expression itself is also of theoretical interest, since it allows one to explicitly express the stationary phase error probability density function and probability current in terms of the mean first slip time. This sheds further light on the interconnections between the conventional modulo-2π approach and the renewal theory approach to the Fokker-Planck method. Extensions to nonperidic equivalent phase detector characteristics are also considered.

Key design parameters associated with the operation of a digital integrate-and-dump filter are identified in this paper. Performance degradation effects associated with the selection of these parameters such as analog-to-digital converter (ADC) gain loading factor, number of bits used, predetection bandwidth, sampling rate, and accumulator length are considered. Numerical results of practical interest are also provided.

The purpose of this paper is to present a model and associated analysis of the deleterious effects which both transmitter and receiver data clock time-base instability have on bit-error probability. The types of time-base instability modeled and analyzed include what is commonly referred to as bit jitter (epoch jitter), bit-jitter rate (time interval jitter), and data asymmetry. The biterror probability is determined as a function of the statistical characteristics of the time-base instability, the data-transition density, the signal-to-noise ratio in the bit-rate bandwidth and the mechanizations of both the data-bit detector and bit synchronizer. The latter is manifested through the bit synchronizer's natural frequency and loop-damping parameters. Numerical results which indicate the sensitivity of the system bit-error rate to various parameters of the model are provided.

This paper discusses the principle of operation of a phaselocked loop using a vector diagram approach. From this diagram the acquisition, tracking, and frequency stability performance measures are introduced without the need of a loop mathematical model and associated loop analysis. Designers of phase-lock technology should find this tutorial discussion useful in understanding and writing specifications to meet system performance and testing requirements. On the other hand, users should find this discussion useful in interfacing with phase-locked loop designers. Additionally, those who wish to obtain an oveview of the phase-lock technical parlance should also find this paper of interest.

A second-order digital phase-locked loop (DPLL) has a finite lock range which is a function of the frequency of the incoming signal to be tracked. For this reason, it is not capable of tracking an input with Doppler rate for an indefinite period of time. In this correspondence, an analytical expression for the hold-in time is derived. In addition, an all-digital scheme to alleviate this problem is proposed based on the information obtained from estimating the input signal frequency.

A two-dimensional Barrett-Lampard expansion is developed to handle two-dimensional nonlinear systems with random Gaussian inputs. The theory is applied to the problem of evaluating the mean signal and the inphase and quadrature noise correlation functions at the output of a TWT nonlinearity exhibiting arbitrary AM-AM and AM-PM characteristics, when the input consists of a narrow-band signal and Gaussian noise. As a specialized application, the classical problem of determining the coherent and incoherent noise correlation functions at the output of a power-law bandpass nonlinearity is also considered. The results are of interest in assessing the performance of coherent satellite communication channels. The theory developed is accompanied by numerical examples of practical interest.

Structure functions are introduced into the theory of correlative tracking systems and how frequency and phase instability enters naturally into the system performance equations is shown. Both the\tau-domain andf-domain peformance is characterized and a Mellin transform theory relating the two is given. The theory is applied to first-, second-, and third-order systems containing arbitrary phase detectors.

This concise paper provides an exact analysis of the phase error statistics of a first-order digital phase-locked loop (DPLL) by soloing the chapman-Kolmogorov equation using the method of moments. Both time independent and time dependent solutions are presented. In addition, the parameters which characterize the performance of a DPLL are identified with those of an analog phase-locked loop (APLL). It is Shown under what design parameter conditions the solution provided herein for a DPLL is equivalent to that obtained by applying the Fokker-Planck equation to the analysis of an APLL. Numerical comparisons are provided for specific parameter ranges of interest in practice.

A general "phase-plane" technique for investigating the stability of nonlinear difference equation is described and applied to determine the stability criterion of a first-order digital phase-locked loop (DPLL). If the loop is stable, it is shown that acquisition behavior can be modeled as a first passage time problem. Using this model, one can evaluate the acquisition probability and the mean time to acquire, from the appropriate Chapman-Kolmogorov (C-K) equation describing the transition of the phase error sequence. This approach is verified by direct simulation.