Multitrack detection with array-head reading is a promising technique proposed for next generation magnetic storage systems. The multihead multitrack (MHMT) system is characterized by intersymbol interference in the downtrack direction and intertrack interference (ITI) in the crosstrack direction. Constructing the trellis of a MHMT maximum likelihood (ML) detector requires knowledge of the ITI, which is generally unknown at the receiver. Furthermore, in a time-varying ITI environment, updating ML trellis labels using adaptively-generated ITI estimates could incur significant delay. In this paper, we propose one approach to solve these issues. The proposed detector uses a different trellis structure whose output labels are independent of the ITI level, with ITI-dependence appearing only in a scale factor used to suitably weight the computed path metrics in order to retain ML optimality. The detector formulation facilitates the design of a gain loop structure that can track the time-varying ITI and provide ITI estimates to adaptively adjust the weights in the path metric evaluation. Simulation results show that the proposed detector architecture with ITI estimation offers a substantial performance advantage over ML detection using a static ITI estimate.

To achieve large storage capacity on magnetic hard disk drives, very high track density is required, causing severe intertrack interference (ITI). Multihead multitrack (MHMT) detection has been proposed to better combat the effects of ITI. Such detection, however, has prohibitive implementation complexity. Reduced-state sequence estimation (RSSE) is a promising technique for significantly reducing the complexity, while retaining good performance. In this paper, several different MHMT models are considered, including symmetric and asymmetric 2H2T systems, and a symmetric 3H3T system. By carefully evaluating the effective distance between two input symbols, we propose optimized set partition trees for each channel model. Different trellis configurations for RSSE are constructed based on the desired performance/complexity tradeoff. Simulation results show that the reduced MHMT detector can achieve near maximum-likelihood (ML) performance with a small fraction of the original number of trellis states. We also use error event analysis to explain the behavior of RSSE. The proposed algorithm could be potentially applied to next generation magnetic recording systems, especially when the ML detector is infeasible due to the high computational complexity.

Multitrack detection for shingled magnetic recording (SMR) using a two-head array system is considered. The channel suffers from intersymbol interference (ISI) in the down-track direction and intertrack interference (ITI) in the crosstrack direction. We propose a practical multihead/multitrack detector that provides a low-complexity approach to adaptive estimation of time-varying ITI. The performance of the proposed detection algorithm is analyzed in terms of its minimum distance parameter, and simulation results show that the proposed detector offers a performance advantage in settings where complexity constraints limit the maximum-likelihood two-track detector to use a static ITI estimate.

In the state-parallel implementation of the Viterbi algorithm, one add-compare-select (ACS) unit is devoted to each state in the treillis. A systematic approach to partitioning, scheduling, and mapping N trellis states to P ACSs, where N>P, is presented here. The area saving of this architecture comes from the reduced number of ACSs and interconnection wires. The design of the ACS, path metric storage, and routing network is discussed in detail. The proposed architecture creates internal parallelism due to the ACS sharing, which can be exploited to increase the throughput rate by pipelining. Consequently, the architecture offers a favorable (smaller) area-time product, compared to the state-parallel implementation.>

In part I the theoretical foundations of a new class of area-efficient architectures for the Viterbi algorithm were established. Area-efficient architectures for practical codes are presented here to illustrate the design procedures and demonstrate the favourable area-time tradeoff results. Three examples from convolutional codes, matched-spectral-null (MSN) trellis codes, and Ungerboeck codes are presented. The application of the area-efficient techniques to codes with a very large number of states, codes with time-varying trellises, and a programmable Viterbi decoder is discussed.>

The authors address the problem of computing exact bounds on the path metric differences in maximum-likelihood sequence detectors based upon the Viterbi algorithm. The calculation of the bounds is formulated as a series of linear programming problems. Numerical results are presented for several examples of uncoded and coded partial-response channels of practical interest in digital data recording applications.>

Summary form only given. The real-time application of trellis coding to partial response channels is described for a rate 8/10 matched-spectral-null (MSN) trellis code on the (1-D) partial response channel. The architectural and design issues of an experimental chip that implements the functions of encoding, decoding, and Viterbi detection are discussed. Two novel techniques in the design of the Viterbi detector are introduced. Modulo normalization of the path metrics, and area-efficient pipelining for the add-compare-select units. Both techniques are effective in producing a regular structure and reducing the number of required interconnections. Area-efficient realization is achieved with little speed degradation. The circuit and layout were designed using LAGER CAD tool. The chip was fabricated in 1.2 mu m CMOS.>

We describe the application of multilevel trellis coding to the transmission of high-speed' voiceband data. The implementation aspects of soft-decision Viterbi decoding associated with such coding are discussed, Real-time performance comparison is made of two coded systems at 9600 bits/s with respect to an uncoded system. The performance sensitivity Of the three systems to DDD channel impairments other than additive Gaussian noise are also described. It is shown that the experimental results agree well with those from theory, and that trellis coding provides significant improvement in performance in the presence of impairments other than additive Gaussian noise.