A review of recent studies on up-to-date IC shows that electromigration (EM) has become one of the major challenges for 2.5D and 3D chiplet heterogeneous integration (CHI) systems. However, most existing researches on EM are focusing on 2D power delivery network without taking Through Silicon Via (TSV) and non-uniformly thermal distribution condition between dies into consideration. To address this problem, this article proposes a novel EM simulation tool ChipletEM for 2.5D and 3D CHI systems. A finite volume method (FVM) based electrical-thermal co-simulation model is employed to get initial temperature and current density inside TSV. And a finite difference time domain (FDTD) solver is used for hydrostatic stress simulation for both nucleation and postvoiding phases. Thermal migration (TM) effect is also considered in the solver. An analytical TSV thermal solver is employed for temperature distribution simulation and thermal dependent current simulation. The FDTD EM solver and TSV thermal solver are coupled together at each time step so that the interaction among EM stress, thermal stress, void growth, resistance change, IR drop and Joule heating effects can be simulated within a single simulation framework. Simulation results show that compared with Finite Element Method (FEM) tool, average error is 0.61% in nucleation phase and 2.4% in growth phase. And the error of proposed method is reduced from 22.22% to 5.24% compared with state of art atomic flux divergence (AFD) method.

Chiplet heterogeneous integration (CHI) is one of the important technology choices to continue Moore’s law. However, due to the characteristics of high power and low supply voltage in CHI systems, heavy currents need to flow through the power delivery network (PDN), and the Joule heating effect will result in the overall temperature increase of the CHI system. Meanwhile, the high temperature will cause the current as well as the performance of the system to degrade and a series of reliability problems will occur. In this article, an effective electrical-thermal coupling model is proposed to predict the steady-state temperature distribution of a 2.5-D CHI system considering the Joule heating effect and the temperature effect on the IR drop. The equivalent electrical conductivity model is also built up to describe the design features of the redistribution layer (RDL), bump, and through silicon via (TSV) structures based on the electrical-thermal duality. Furthermore, the governing equations for voltage distribution and temperature distribution are solved simultaneously by utilizing the finite volume method (FVM) with nonuniform mesh to realize the electrical-thermal co-simulation of the multiscale CHI system. The model application is further performed to investigate the influence of the model parameters on the voltage drop and temperature distribution of the CHI system. The verified systems and simulated results of the present investigation demonstrate the viability and accuracy of voltage and temperature field co-simulation and indicate that the new proposed electrical-thermal model is helpful in thermal and voltage drop analysis of packaging structures with the Joule heating effect and can be adopted to assist in the physical design optimization of 2.5-D CHI or 3-D heterogeneous stacked chips.

Due to a variety of limitations on the system-on-chip (SoC), the microelectronics industry is now facing challenges and making slow progress in recent years. With architecture design and advanced packaging advantages, chiplet heterogeneous integration (CHI) systems have become a promising solution to long-lasting hardship. However, high power consumption in CHI systems generates massive heat and makes thermal design a demanding task. Therefore, an accurate tool for thermal simulation is indispensable in the design flow. In this article, a multiscale anisotropic thermal model is proposed for the CHI systems. It considers the feature-scale thermal conductivities of different materials to predict the package-scale steady-state temperature fields. Specifically, the local material composition and thermal conductivity of redistribution layers (RDLs) are extracted from design layout files by constructing an equivalent thermal conductivity algorithm of local feature structures. As for through silicon via (TSV) and bump arrays, the anisotropic distributions of thermal conductivity can also be derived with equivalent algorithms. Other structures are considered homogeneous blocks to significantly reduce the computational expense without losing the generality of the proposed model. Compared with the previous isotropic thermal model of CHI systems, the present multiscale anisotropic thermal model is proven to make temperature prediction and hotspot detection more reliable. With this tool, the reliability problems that are unpredictable and obscure for isotropic thermal models can be identified in advance, and more reasonable design space can be explored in the design flow of the CHI systems.

Automatic object classification is an important issue in traffic scene surveillance. Appearance variation due to perspective distortion is one of the most difficult problems for moving object detection, tracking, and recognition. We propose an active transfer learning approach to bridge the gap between appearance variations under two different scenes. Only a small number of training samples are required in the target scene, which can be combined with transferred samples of the source scene to achieve a reliable object classifier in the target scene, and active learning strategy makes the algorithm more efficient. Abundant experiments are conducted and experimental results demonstrate the effectiveness and convenience of our approach.