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Edward Y. Wang

dblp:122/4802 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2012
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Processor architecture and microarchitecture · 62% Cloud and datacenter computing · 38%

Topics — the 4 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Processor architecture and microarchitecture › binary translation
dynamic binary translation
0.112012
Bringing Virtualization to the x86 Architecture with the Original VMware Workstation · ACM Trans. Comput. Syst. 2012
Cloud and datacenter computing
virtualization
0.112012
Bringing Virtualization to the x86 Architecture with the Original VMware Workstation · ACM Trans. Comput. Syst. 2012
Processor architecture and microarchitecture
instruction set architecture
0.012012
Bringing Virtualization to the x86 Architecture with the Original VMware Workstation · ACM Trans. Comput. Syst. 2012
Processor architecture and microarchitecture › instruction set architecture › CISC
x86
0.012012
Bringing Virtualization to the x86 Architecture with the Original VMware Workstation · ACM Trans. Comput. Syst. 2012

Methods — techniques the papers use, named apart from their topics

trap-and-emulate · 0.1partial evaluation · 0.1dynamic binary translation · 0.1adaptive retranslation · 0.1
YearPublicationVenuePosition
2012 Bringing Virtualization to the x86 Architecture with the Original VMware Workstation
abstract
This article describes the historical context, technical challenges, and main implementation techniques used by VMware Workstation to bring virtualization to the x86 architecture in 1999. Although virtual machine monitors (VMMs) had been around for decades, they were traditionally designed as part of monolithic, single-vendor architectures with explicit support for virtualization. In contrast, the x86 architecture lacked virtualization support, and the industry around it had disaggregated into an ecosystem, with different vendors controlling the computers, CPUs, peripherals, operating systems, and applications, none of them asking for virtualization. We chose to build our solution independently of these vendors. As a result, VMware Workstation had to deal with new challenges associated with (i) the lack of virtualization support in the x86 architecture, (ii) the daunting complexity of the architecture itself, (iii) the need to support a broad combination of peripherals, and (iv) the need to offer a simple user experience within existing environments. These new challenges led us to a novel combination of well-known virtualization techniques, techniques from other domains, and new techniques. VMware Workstation combined a hosted architecture with a VMM. The hosted architecture enabled a simple user experience and offered broad hardware compatibility. Rather than exposing I/O diversity to the virtual machines, VMware Workstation also relied on software emulation of I/O devices. The VMM combined a trap-and-emulate direct execution engine with a system-level dynamic binary translator to efficiently virtualize the x86 architecture and support most commodity operating systems. By relying on x86 hardware segmentation as a protection mechanism, the binary translator could execute translated code at near hardware speeds. The binary translator also relied on partial evaluation and adaptive retranslation to reduce the overall overheads of virtualization. Written with the benefit of hindsight, this article shares the key lessons we learned from building the original system and from its later evolution.
Edouard Bugnion, Scott Devine, Mendel Rosenblum, Jeremy Sugerman, Edward Y. Wang
ACM Trans. Comput. Syst.5