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Oscar Acevedo

dblp:123/5465 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 2016
0000-0001-7080-0386ORCID · reported

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 100%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Electronic design automation › hardware verification and test › design for testability › built-in self-test
built-in test generation
0.212016
On The Computation of LFSR Characteristic Polynomials for Built-In Deterministic Test Pattern Generation · IEEE Trans. Computers 2016
Electronic design automation
hardware verification and test
0.212016
On The Computation of LFSR Characteristic Polynomials for Built-In Deterministic Test Pattern Generation · IEEE Trans. Computers 2016
Electronic design automation › hardware verification and test
test data compression
0.212016
On The Computation of LFSR Characteristic Polynomials for Built-In Deterministic Test Pattern Generation · IEEE Trans. Computers 2016

Methods — techniques the papers use, named apart from their topics

sidorenko-bossert theorem · 0.2berlekamp-massey algorithm · 0.2
YearPublicationVenuePosition
2016 On The Computation of LFSR Characteristic Polynomials for Built-In Deterministic Test Pattern Generation
abstract
In built-in test pattern generation and test set compression, an LFSR is usually employed as the on-chip generator with an arbitrarily selected characteristic polynomial of degree equal, according to a popular rule, to$S_\mathrm{ max}+20$, where$S_\mathrm{ max}$is the maximum number of specified bits in any test cube of the test set. By fixing the polynomial a priori a linear system only needs to be solved to compute the required LFSR initial states (seeds) to generate the target test cubes, but the disadvantage is that the polynomial degree (length of the LFSR and seed bit size) may be too large and the fault coverage cannot be guaranteed. In this paper we address the problem of computing a polynomial of small degree directly from the given test set without having to solve multiple non-linear systems and fixing a priori the polynomial degree. The proposed method uses an adaptation of the Berlekamp-Massey algorithm and the Sidorenko-Bossert theorem to perform the computation. In addition, the method guarantees (by design) that all the test cubes in the given test set are generated, thereby achieving 100% coverage, which cannot be guaranteed under the “trial-and-error”$S_\mathrm{ max}+20$rule. Experimental results verify the advantages that the proposed methodology offers in terms of reduced polynomial degree and 100% coverage.
Oscar Acevedo, Dimitrios Kagaris
IEEE Trans. Computers1