The development of a 2400-b/s speech digitizer which provides an acceptable level of intelligibility and quality over land mobile satellite channels is described. Performance tests over simulated channels in the UHF band (800 MHz) are presented. The voice digitizer is a linear prediction (LPC) vocoder which uses a channel error correction and concealment procedure tailored to error statistics for a minimum-shift keyed (MSK) downlink to a moving vehicle. The error-handling technique is based on perceptual criteria and utilizes the parametric nature of LPC representation of speech. A single-error-correcting, single-burst-detecting (28, 20) fire code is shown to be the best choice for the application. The intelligibility of the vocoder is measured and compared to the standard LPC-10 algorithm. The major remaining sources of speech quality degradation due to channel errors are determined and ranked.>

With the commercial availability of high speed digital signal processors, it is now possible to implement all the linear predictive coding (LPC) tasks (excluding D-A/A-D conversion) on a single chip. In this paper, a very small, high quality, full-duplex, 10th order 2.4 kbps LPC vocoder is described. A single Texas Instruments TMS-320 microprocessor performs LPC analysis, pitch detection, synthesis, and data I/O. At the time of writing this paper, a total of 20 off-the-shelf integrated circuits were used occupying two thirds of a 14cm × 18cm wirewrap board (excluding power supply). The total power dissipation is less than 2 watts. The chip count may be reduced by a factor of two by combining the random logic on a semi-custom integrated circuit. When produced commercially, the cost of this vocoder should be considerably less than existing LPC units.