EDBT 2026 Demo / reviewers in the wild / expert
Douglas E. Marquardt
dblp:125/2389
· DBLP profile ↗
1ranked-venue papers
1as first author
0since 2021 · last 1989
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Memory systems · 91% Interconnection networks and networks-on-chip · 9% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Memory systems
cache coherence |
0.0 | 1 | 1989 | C2MP: a cache-coherent, distributed memory multiprocessor-system · SC 1989 |
Memory systems › cache coherence
cache-coherent shared memory |
0.0 | 1 | 1989 | C2MP: a cache-coherent, distributed memory multiprocessor-system · SC 1989 |
Memory systems › cache coherence › cache coherence protocol
snoopy coherence |
0.0 | 1 | 1989 | C2MP: a cache-coherent, distributed memory multiprocessor-system · SC 1989 |
Interconnection networks and networks-on-chip › switch architecture
crossbar switch |
0.0 | 1 | 1989 | C2MP: a cache-coherent, distributed memory multiprocessor-system · SC 1989 |
Methods — techniques the papers use, named apart from their topics
private caching · 0.0bus-based memory interconnection · 0.0
| Year | Publication | Venue | Position |
|---|---|---|---|
| 1989 | C2MP: a cache-coherent, distributed memory multiprocessor-systemabstractCurrent research into the problems of cache coherency in multiprocessor (MP) systems, has primarily focused on bus based memory interconnection networks (M-ICN) and the use of various types of “snooping” cache coherency protocols. Bus bandwidth limitations can be alleviated through the use of wider bandwidth general interconnection structures, such as a crossbar switch. However, if private caches are used, the cache coherency problem becomes multiply compounded. Little work has been done to address this problem. Douglas E. Marquardt, Hasan S. Alkhatib |
SC | 1 |