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D. John Shakshober

dblp:125/2430 · DBLP profile ↗
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1ranked-venue papers
1as first author
0since 2021 · last 1989
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Parallel and multicore computing · 91% Memory systems · 9%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Parallel and multicore computing
image processing
0.011989
Parallel algorithms for super performance · SC 1989
Parallel and multicore computing
matrix operations
0.011989
Parallel algorithms for super performance · SC 1989
Parallel and multicore computing
parallel algorithms
0.011989
Parallel algorithms for super performance · SC 1989
Memory systems › cache
cache performance
0.011989
Parallel algorithms for super performance · SC 1989

Methods — techniques the papers use, named apart from their topics

correlation · 0.0convolution · 0.0FFT · 0.0BLAS · 0.0
YearPublicationVenuePosition
1989 Parallel algorithms for super performance
abstract
This paper describes the development of parallel algorithms on M31, a large-scale, shared memory multiprocessor VAX computer. Matrix operations have been optimized for a subset of the BLAS, the Basic Linear Algebra Subroutines. Efficient image processing algorithms were also developed for parallel Convolution, Correlation, and Fast Fourier Transforms (non-synchronizing one and two dimensional FFTs). The effect of matrix partitioning was examined using two different memory allocation strategies. We found that contiguous memory partitioning can yield performance gains beyond the linear expectation. Super performance was achieved through a parallel algorithm devised to minimize cache-replacements. Fewer replacements allowed high CPU utilization with minimal system overhead. Inefficient matrix partitioning tended to stifle parallel performance because frequent cache misses created heavy bus traffic and thus increased system overhead.
D. John Shakshober
SC1