This paper provides a detailed examination of the influence of common-mode voltage (CMV) on leakage and bearing currents in Permanent Magnet Synchronous Motors (PMSMs) for Electric Vehicles (EV) powered by Three-Level Active Neutral-Point Clamped (ANPC) inverters. A comparison of various carrier-based Pulse Width Modulation (PWM) techniques is conducted, evaluating their performance in terms of phase current Total Harmonic Distortion (THD), leakage current, CMV, and bearing voltage. An equivalent circuit model, integrating PMSM’s parasitic capacitances and bearing dynamics, is developed to analyse bearing behaviour under both healthy and fault conditions. Simulation results obtained in the PLECS environment offer valuable insights for selecting the modulation strategies that effectively balance CMV reduction, motor longevity, and inverter output quality, thereby enhancing the reliability of the system.

Hybrid batteries combine cells of complementary chemistries, each offering distinct strengths, resulting in battery designs with intermediate features, tailored for each application. With the aim of contributing to the development of modular and scalable hybrid batteries, this paper proposes a novel hybrid battery configuration consisting of two different battery banks, each formed by three series-connected battery modules, and a four-level neutral-point-clamped dc-dc power converter to interface the two battery banks. A suitable operating principle, a modulation strategy, and a closed-loop control are conceived for the proposed system. The power converter enables bidirectional power flow between the battery banks, and it also enables a lossless battery module state of charge balancing, simply by regulating the contribution of each module to the total power transfer, as this is one of the degrees of freedom of the selected multilevel converter topology. Simulation and experimental results verify the feasibility and good performance of the proposed system, demonstrating a substantial regulation margin of battery module currents, even at high modulation index values.

Accurate aging assessment of switching power semiconductors in power converters is essential due to their critical influence on converter reliability and operational lifespan. Traditional aging evaluation methods rely on intrusive sensors embedded within the power devices, which complicate electromagnetic interference management and limit the practicality of real-time monitoring. This paper proposes a comprehensive digital-twin framework and a simple algorithm to assess the state of health (SOH) of SiC power devices in switching-cell-array based power converters. The digital twin replicates the system electro-thermal behavior from the existing converter control current and voltage measurements and the modulation parameters. The algorithm estimates the power devices on-state resistance through the digital twin outputs and easy-to-integrate temperature sensors within the converter leg printed-circuit board. The on-state resistance provides a direct estimation of the power devices SOH. This framework delivers real-time insights into the converter SOH and degradation patterns, allowing predictive maintenance strategies. The proposed health assessment strategy is validated through simulations.

This paper presents the design of a new programmable and compact switching cell with an integrated intelligent electronic fuse (iFuse). The switching cell forms an elementary block from which modular, scalable, and robust multilevel power converters can be built. Based on a 40-V GaN high-electron-mobility transistor (HEMT), this new design incorporates self-powered driving circuitry, a switching-cell state-monitoring circuit with fault-detection capabilities, and an intelligent electronic fuse (iFuse), all within a significantly optimized PCB area. A reprogrammable signal processing device is used, consolidating the functions of multiple discrete components into a single unit. This results in a more flexible, reduced-cost, and reduced-size design. The iFuse ensures the isolation within 5 μs of the GaN HEMT from the rest of the converter when a failure event occurs, preventing the damage of other devices and increasing the converter reliability. The correct operation and good performance of the design are successfully verified through experimental tests.

Non-isolated integrated chargers take advantage of the electric vehicle’s on-board power electronic for charging purposes: the traction drive inverter is a good candidate to be used in the battery charging process, while the stator windings of the electrical traction motor can be utilized as static inductors. In a typical non-isolated three-phase grid-connected system, there exist a leakage current flowing through the common mode (CM) parasitic path between the vehicle’s chassis and the DC ground. Large leakage current lead to potential electric shocks to the end-users, as well as on-board electronics failures. In this paper, a 3-level Active Neutral Point Clamped (ANPC) inverter is used together with the stator windings of a permanent magnet synchronous machines (PMSM) for charging purposes. The issue of CM leakage current through the parasitic path is analysed for different earthing systems. Different modulation techniques are critically compared in terms of effectiveness in reducing the leakage current, grid currents distortion and capability in reducing the DC current ripple during battery charging. Simulation results are provided in support of the analysis.

A charger for two batteries connected in series is presented in this work. From the three-phase grid, the batteries are charged through a three-level neutral-point-clamped ac-dc converter in cascade with a three-level dual active bridge converter. The system provides galvanic isolation and allows bidirectional power flow. A simple control strategy to charge the batteries is presented, based on the regulation of the common-and differential-mode components of the batteries’ charging currents. With this control approach, each battery bank can be charged independently, allowing it to reach full battery bank capacity, even under different battery initial state-of-charge values or different battery nominal capacities. Moreover, the proposed control system also regulates the total dc-link voltage and the dc-link voltage balance in both dc-links of the system. The simulation results verify the feasibility of the proposed implementation and control system approach.

This article explores the thermal and reliability benefits of configuring the power semiconductor block of power converters with several small standard power semiconductor devices instead of a few larger ones at a fixed total chip area. The effectiveness of a finer power semiconductor device granularity is analyzed in the context of a synchronous buck converter design under different operating conditions and employing a recently proposed component, the switching-cell array, to implement the semiconductor-component block of the converter. Comparative evaluations are undertaken under different degrees of granularity and in terms of semiconductor loss distribution, semiconductor temperature distribution, and converter mean time to failure. The article also discusses the thermo-electrical and reliability models employed, and the assumptions made for a fair and straightforward comparison in a generic case. The comparison results reveal that a finer granularity can potentially provide remarkable benefits, although the incremental improvements decrease as the granularity becomes finer. A tradeoff solution must be sought in each specific case balancing the benefits achieved with the added complexity.

With the aim to implement a suitable controller for a three-phase dc–ac multilevel active-clamped converter to enable its use in practice, and as a first step toward a full closed-loop converter control implementation into a single field-programmable gate array (FPGA) device, this paper presents the structure and features of an FPGA implementation of an appropriate pulsewidth modulation (PWM) strategy. The selected PWM strategy guarantees dc-link capacitor voltage balance in every switching cycle, and covers both the undermodulation and overmodulation regions. A flexible implementation is conceived, allowing the variation of important operating parameters, such as the modulation index and switching frequency, through a simple user interface. The key aspects to achieve an efficient and robust FPGA implementation are discussed. Experimental results in a four-level converter prototype controlled with an Altera Cyclone III device under different operating conditions match fairly well with the expected results obtained through simulation, thus verifying the accurate performance of the FPGA-based modulator.

Predictive current control is applied to a wind energy conversion system implemented with a permanent-magnet synchronous generator connected to the grid through a back-to-back neutral-point-clamped converter. This control approach allows to work in steady-state and to fulfill the low-voltage ride through requirements demanded by the power system operators. Dc-link neutral point voltage balance is also achieved by means of the predictive control algorithm.

This paper presents a converter consisting of a dual active bridge built upon three-level neutral-point-clamped legs in order to synthesize a five-level medium- or high- frequency stepped waveform on each side of the transformer. Thanks to the modulation extra degrees of freedom, the transformer current harmonic content can be reduced (less magnetic losses) and the fundamental component of the transformer primary and secondary voltages can be adjusted to minimize the reactive power (less conduction losses). A modulation strategy and control scheme to regulate the dc-link capacitor voltage balance is proposed. The topology, modulation, and balancing control are validated through simulations.

This paper presents an efficiency analysis of a recently-published topology, the multilevel-active-clamped (MAC) topology. In order to assess the MAC topology, an efficiency comparison between a four-level MAC leg and a conventional two-level leg operating in low voltage is carried out. First, overall losses of both topologies are estimated. Then, experimental tests to measure their overall losses and their efficiency are presented. Finally, obtained results from the experimental tests are compared with the estimations to substantiate the analysis. The efficiency of the MAC topology is higher in all the switching-frequency range.

A three-level neutral-point-clamped inverter needs a controller for the neutral-point voltage. Typically, the controller design is based on a dynamic model. The dynamic model of the neutral-point voltage depends on the pulse width modulation technique used for the inverter. A pulse width modulation strategy which allows modeling the neutral-point voltage as a first-order continuous function is proposed in this paper. The new model shows that the neutral-point current is proportional to the reactive power drawn from the inverter. Since the model is a first-order model, a simple proportional controller is used in this paper to control the neutral-point voltage. Experimental results verifying the proposed modulation strategy and the controller are also presented in this paper.