This paper presents the modeling and control design for a high-gain step-up converter used as a power factor compensator, including a grid-tied LCL filter. The DC-DC converter is connected to the electrical grid through a full-bridge rectifier and a third-order coupling filter. The main advantage of this structure is the high-voltage conversion ratio compared to typical PFC applications. The proposed controller is based on the average model of the system, resulting in two control loops: the current tracking loop and the voltage regulation loop. The current tracking loop is designed as a proportional-resonant controller to ensure power factor compensation. The voltage regulation loop aims to maintain the output voltage at the desired reference value using a proportional-integral (PI) controller. Numerical simulations are conducted to evaluate the effectiveness of the proposed control strategy.

This paper presents the design of a control strategy for a modular high-gain DC-DC converter, based on the system’s average model. The proposed approach features a dual-loop architecture comprising an inner current control loop and an outer voltage regulation loop. The inner loop is designed to ensure accurate tracking of reference signals, achieving zero steady-state error through a proportional-integral (PI) control law applied to the inductor output current. For the outer control loop, a proportional-integral (PI) controller is proposed to regulate the output voltage. This approach offers key advantages, including accurate reference tracking and robust voltage regulation, even under varying load or reference conditions. Notably, it achieves these objectives using only two measured signals, simplifying implementation and reducing system complexity. Numerical simulations are performed to assess the effectiveness and robustness of the proposed control strategy in different operating scenarios.

This paper presents a multilevel converter for a photovoltaic transformerless application. The proposed application consists of a power converter with asymmetrical DC-link voltage, referred to as 7L-HBNPC converter, able to inject active power into the grid, producing seven output voltage levels and mitigating the leakage-ground currents. The converter uses the conventional HBNPC connection to reach seven output voltage levels. The strategy to mitigate the leakage ground currents to the grid consists of a DC-link tied LC filter. This filter is formed of two output inductors with a couple of capacitors connected to the DC-link terminals. Thus, the model of the converter based on the common-mode and differential-mode variables is presented for this filter. Besides, based on the differential-mode model structure, a control scheme is proposed. This control scheme is aimed to guarantee active-power injection to the grid despite changes in the power of the reference. Besides, the common-mode model provides information on the behavior of the leakage–ground current compensation. The seven output voltage levels are obtained by a particular design of the modulation scheme structure which produces symmetrical seven output voltage levels in a specific DC voltage unbalance-value. Finally, the performance of the proposed application is assessed using numerical simulations in a 5 kW test converter.

In this paper the analysis and control of a buck converter with an LCLC filter at the output is addressed. The proposed LCLC output filter buck converter and controller achieve highly reduced output current ripple and reduced passive component values by replacing the common LC output filter by an LCLC network. The converter has an increased power density at reduced costs and reduced power losses. The controller provides the necessary damping to prevent undesired oscillating behaviors and to assure closed-loop asymptotic stability. The solution, that is the LCLC output filter buck converter plus control, is aimed at supplying to sensitive power loads such as electrolytic capacitors, supercapacitors, batteries and fuel cells in later stages of power electronics systems. Numerical results are presented to show the performance of the proposed solution.

This paper presents a model-based controller for a single-phase grid-tied transformerless multilevel PV inverter. The selected topology is known as single-phase three-level stacked-cell (3L-SC). It is based on the conventional H-bridge, where a multilevel output voltage is achieved by using a split DC-link with an active bidirectional switch. The proposed controller comprises a current control loop aimed to guarantee active power injection, and a voltage balance loop aimed to balance the capacitor voltages in the split DC-link. In the inner loop, a sinusoidal current in phase with the grid voltage is injected in spite of harmonic distortion present on the voltage signal. For this, the inner loop includes a particular modification of a repetitive scheme, which is able to handle a fractional delay issue. A pulse width based modulation strategy is also proposed to generate proper switching sequences for the switching devices in the multilevel inverter. Numerical results are presented to show the performance of the proposed solution.

This paper presents a current controller for a transformerless three-phase two-level inverter grid connected by means of an LCL output filter. The proposed controller indirectly controls the grid-side current by controlling the inverter-side current. In this fairly simple controller, the damping injection is done by a simple proportional action of the measured inverter-side current, where the main issue is the design of the inverter-side current reference. It is shown that the inverter-side current has to be as distorted as necessary to guarantee a grid-side current of a pure balanced sinusoidal shape. The proposed controller considers positive and negative sequences of signals, and includes a harmonic compensation mechanism. Therefore, it is aimed to properly perform under unbalance and harmonic distortion. Simulations are presented to assess the performance of the proposed scheme.

This paper presents a self-oscillating electronic driver for a 36 W LED string. The design consists of a simple control that reduces the component number and cost of the driver. Self-oscillating converters are popular in compact fluorescent lamps; therefore, it is proposed the use of this self-oscillating control technique for the LED lamp. The self-oscillating LED driver represents a very suitable solution in compact LED products. This paper describes the design of a self-oscillating electronic driver at high frequency. The output of the sine wave of the resonant inverter is rectified. This LED driver not require of electrolytic capacitors, because LED is operated with pulsating output current.

In this paper an improved current mode control for a three-phase rectifier is presented which is able to compensate the line currents under unbalanced operation of the supplied grid voltage. Instrumental for the controller design is the computation of the current reference, where, the key point is the use of the positive-sequence of the grid voltage to construct it. The control scheme is designed to guarantee current tracking of the positive-sequence of the grid voltage and the average voltage regulation at the output towards the desired voltage reference. The overall resulting controller is composed by two main control loops, namely, current (or inner), the voltage (or outer) control loops and additionally a positive-sequence estimator of the grid is used to compute the current reference. The current control loop is designed as a proportional controller with a couple of adaptive estimators which have been added to cope with parameter uncertainties of the filter. The voltage control loop consists of an Integral plus a Proportional controller whose output signal acts as a modulating signal of the current reference.

This paper studies a modified DC-DC boost converter where the input inductance has been replaced by an LCL filter. The voltage conversion ratio of the proposed converter is equivalent to the conversion ratio of a conventional boost converter, and it has only one active switching device. A controller is proposed to regulate the output voltage to a given reference with guaranteed reduced input current ripple, i.e., high-frequency current components are minimized at the input current source. Low current ripple is required when dealing with sensitive electric power sources such as fuel cells, batteries and electrolytic capacitors used at DC-links in power electronics applications. The controller design follows a Lyapunov approach, and provides active damping to the input LCL filter. Numerical simulations are presented to evaluate the closed-loop performance.

Transformerless photovoltaic systems are one of the best options to connect a photovoltaic system to the electrical grid given their high efficiency, low cost, small size and low weight regarding their counterparts based on a transformer. In this paper a multilevel single-phase inverter is aimed to link a photovoltaic generator with the electrical grid with reduced common mode current. A sinusoidal based modulation strategy is also presented which focus not only in the reduction of the common mode current but also in the reduction of the switching and conduction losses. Five voltage levels are obtained at the inverter output, therefore, a good behavior is achieved regarding harmonic distortion. Numerical results show that the proposed inverter and modulation strategy give a reduced common mode current and low harmonic distortion which is suitable for transformerless photovoltaic systems.

Repetitive schemes are composed by the interconnection of delay lines. These schemes are usually implemented in a digital way, where delay lines are replaced by discrete delays. Each discrete delay is obtained as the ratio between the required delay time in continuous time and the sampling period. A problem arises whenever the delay time of the controller is not an integer multiple of the sampling period. This is referred in the literature as the fractional delay (FD) issue. The delay time is, in general, a function of the fundamental frequency of the signals to be processed. There are, however, applications where the fundamental frequency varies on time, which entails variable FD (VFD). This work presents a relatively simple solution to implement repetitive schemes subject to a VFD issue. The solution consists in the introduction, on each delay line of the repetitive scheme, of an additional filter structure, called Farrow structure, aimed to compensate such a VFD issue. In particular, the present paper focuses on the 6k ± 1 repetitive scheme, though similar approach can be applied to other repetitive schemes. Numerical results are presented to confirm the benefits of the proposed modification, experiments are in process and will be presented in the final version of the paper.

This paper presents the design guidelines of electronic ballast for HID lamps. High efficient electronic ballast with high power factor and low THD (total harmonic distortion) is presented. The use of input current shaper converters (ICSC) working in Discontinuous-Conduction Mode (DCM) to stabilize the discharge arc in High Intensity Discharge (HID) lamps is proposed. The analysis of how the ICSC stabilizes the lamp current through the analysis of the output capacitor Co and model lamp is presented. The results indicated the feasibility to stabilize the lamp and obtaining high efficiency, high power factor and low THD in a single stage is presented.

This paper presents the modeling and control design of a single-phase full bridge neutral point clamped (FB-NPC) multilevel converter used in an active power filter (APF) application. The proposed topology is aimed to compensate reactive power and current harmonic distortion. Based on the system model, a multi-loop controller is proposed, which is aimed to accomplish three control objectives, namely, AC current tracking, and DC voltage regulation and balance. The controller comprises two main loops referred as the inner (current) loop, and the outer (voltage) loop. The outer loop includes both the regulation loop and the balance loop. The inner loop is aimed to compensate both the power factor (PF) displacement and the harmonic distortion of the grid current. The control design considers odd harmonics of the fundamental, as this is the usual distortion present in single-phase nonlinear loads. The proposed solution guarantees a line current proportional to the fundamental component of the grid voltage. Numerical results are presented to assess the performance of the proposed solution. Experimental results are under development and will be presented in the final version of the paper.

Single-phase transformerless photovoltaic (PV) inverters have become more widespread in the solar energy market. This is due to the higher efficiencies they achieve together with the very low ground currents, which are their main advantages. In this paper a multilevel transformerless single-phase topology, based on the H-bridge with an active clamping, is proposed. Multilevel output voltage is achieved by using a split DC link and an active bidirectional switch to clamp the first leg in the H-bridge circuit. Therefore, a good behavior is achieved regarding total harmonic distortion (THD). A sinusoidal based pulse width modulation (PWM) strategy is also proposed to control the power converter. Numerical results show that the proposed PV inverter complies with the transformerless norms and regulations, operating with high efficiency, and being suitable for the transformerless PV inverters market.

Repetitive schemes represent a very attractive solution for harmonics compensation, as they are simple to implement and the computational effort is reduced. Their implementation, usually performed in digital form, involves the interconnection of a single delay line or a simple array of delay lines. In discrete time domain, a delay line is implemented using a given number of memory locations, where samples are allocated and released after a specific number of sampling periods (discrete delay) equivalent to the delay time. This discrete delay is obtained as the ratio between the sampling period and the required delay time. The problem arises whenever the delay time is a noninteger multiple of the sampling period, in this case the discrete delay is a real positive number having a fractional part. This issue is referred in signal processing literature as fractional delay. This paper presents a solution for the practical implementation of repetitive schemes where the delay lines are subject to the fractional delay issue. The solution consists in the introduction, on each delay line, of an additional filter aimed to approximate such a fractional delay. This filter has the structure of a finite impulse response (FIR) filter, and thus, it is referred as FIR fractional delay (FIR-FD) filter. Its design follows a Lagrange interpolation technic, which relays in explicit formulae for the computation of the coefficients of the FIR filter. In particular, the present paper is focused in the repetitive scheme proposed in [11] for compensation of harmonics 6ℓ ± 1 (ℓ = 0, 1, 2, ...∞) of the fundamental frequency . Numerical results are presented to confirm the benefits of the proposed scheme. Experiments are in process and the results will be available in the final version of the paper.

This paper presents a model-based controller for an active power filter (APF) to compensate reactive power and current harmonic distortion in a single-phase system. A Half-bridge Neutral Point Clamped (NPC) topology is selected as a voltage source inverter (VSI) to implement the APF. The control scheme is composed by three control loops referred as the inner control loop (or current loop), the regulation loop, and the balance control loop. The inner control loop is aimed to compensate both the displacement power factor (DPF) and the harmonic distortion of the current flowing to the grid. Only compensation of odd harmonics is considered which is the distortion present in most single-phase non-linear loads. The regulation and balance loops are designed to achieve the regulation and balance of the capacitor voltages in the DC-link. Numerical results are presented to show the performance of the proposed solution.

Voltage source inverters (VSI) connected to the grid by means of LCL filters offer benefits in the injection of active power into the grid, since they provide low harmonic distortion and a small size of the output filter. However LCL grid connected VSI must be designed in order to provide damping at the filter resonance frequency. This paper presents the design and analysis of a model based controller for an LCL coupling filter to inject active power into the grid for single phase photovoltaic transformerless applications. The control objectives are to provide closed-loop stability and to assure that the current to be injected follows a reference which is proportional to the grid voltage. Therefore, these objectives guarantee the active power injection to the grid. The proposed output feedback controller is based on the error model of the LCL filter and makes use only of the measurements of the output current of the inverter and the grid voltage.

Single-phase cascade multilevel inverters are able to synthesize a sinusoidal AC voltage by means of multiple voltage levels at the output. This feature makes them appealing for photovoltaic (PV) applications given their low harmonic distortion and therefore, the small size of the filter used. However, the cascade multilevel inverter (CMI) is not directly functional in grid-connected PV transformer-less systems since the variable voltage across the stray capacitances embodied between the PV panel and the ground, may generate large leakage ground currents. In order to address this problem, it is proposed a modulation strategy to control the HB-CMI. This modulation strategy allows to operate the converter with very low leakage ground currents. Among the advantages of this CMI topology is that the amplitude of the output voltage, compared with a single HB topology, is higher and makes possible the power injection into the grid without a voltage boost stage. Numerical results show that the proposed modulation strategy reduces the leakage current and make the topology suitable for transformer-less PV applications.