Demo Data from EDBT 2026 / reviewers in the wild / expert
Can Hantas
dblp:125/7655
· DBLP profile ↗
2ranked-venue papers
0as first author
0since 2021 · last 2013
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
High-performance computing · 45% Cloud and datacenter computing · 34% Parallel and multicore computing · 10% | |
| Theoretical computer science
1 paper |
Graph algorithms and graph theory · 100% | |
| Software engineering, system software, and programming languages
1 paper |
Operating systems · 100% |
Topics — the 8 heaviest of 8, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Operating systems › resource management › memory management
memory allocation |
0.2 | 1 | 2013 | A decoupled local memory allocator · ACM Trans. Archit. Code Optim. 2013 |
High-performance computing › scientific data analysis
in-situ analysis |
0.2 | 1 | 2013 | GoldRush: resource efficient in situ scientific data analytics using fine-grained interference aware execution · SC 2013 |
Cloud and datacenter computing › resource management
resource harvesting |
0.2 | 1 | 2013 | GoldRush: resource efficient in situ scientific data analytics using fine-grained interference aware execution · SC 2013 |
Graph algorithms and graph theory
graph coloring |
0.2 | 1 | 2013 | A decoupled local memory allocator · ACM Trans. Archit. Code Optim. 2013 |
Graph algorithms and graph theory › graph coloring
interval graph coloring |
0.2 | 1 | 2013 | A decoupled local memory allocator · ACM Trans. Archit. Code Optim. 2013 |
Parallel and multicore computing › parallel scheduling › resource-aware scheduling
interference-aware scheduling |
0.0 | 1 | 2013 | GoldRush: resource efficient in situ scientific data analytics using fine-grained interference aware execution · SC 2013 |
High-performance computing
scientific computing systems |
0.0 | 1 | 2013 | GoldRush: resource efficient in situ scientific data analytics using fine-grained interference aware execution · SC 2013 |
Memory systems › on-chip memory
scratchpad memory |
0.0 | 1 | 2013 | A decoupled local memory allocator · ACM Trans. Archit. Code Optim. 2013 |
Methods — techniques the papers use, named apart from their topics
complexity analysis · 0.5clustering heuristic · 0.5resource stealing · 0.2fine-grained scheduling · 0.2
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2013 | GoldRush: resource efficient in situ scientific data analytics using fine-grained interference aware executionabstractSevere I/O bottlenecks on High End Computing platforms call for running data analytics in situ. Demonstrating that there exist considerable resources in compute nodes un-used by typical high end scientific simulations, we leverage this fact by creating an agile runtime, termed GoldRush, that can harvest those otherwise wasted, idle resources to efficiently run in situ data analytics. GoldRush uses fine-grained scheduling to "steal" idle resources, in ways that minimize interference between the simulation and in situ analytics. This involves recognizing the potential causes of on-node resource contention and then using scheduling methods that prevent them. Experiments with representative science applications at large scales show that resources harvested on compute nodes can be leveraged to perform useful analytics, significantly improving resource efficiency, reducing data movement costs incurred by alternate solutions, and posing negligible impact on scientific simulations. Fang Zheng 0003, Hongfeng Yu 0001, Can Hantas, Matthew Wolf, Greg Eisenhauer, Karsten Schwan, Hasan Abbasi, Scott Klasky |
SC | 3 |
| 2013 | A decoupled local memory allocatorabstractCompilers use software-controlled local memories to provide fast, predictable, and power-efficient access to critical data. We show that the local memory allocation for straight-line, or linearized programs is equivalent to a weighted interval-graph coloring problem. This problem is new when allowing a color interval to “wrap around,” and we call it the submarine-building problem. This graph-theoretical decision problem differs slightly from the classical ship-building problem, and exhibits very interesting and unusual complexity properties. We demonstrate that the submarine-building problem is NP-complete, while it is solvable in linear time for not-so-proper interval graphs, an extension of the the class of proper interval graphs. We propose a clustering heuristic to approximate any interval graph into a not-so-proper interval graph, decoupling spill code generation from local memory assignment. We apply this heuristic to a large number of randomly generated interval graphs reproducing the statistical features of standard local memory allocation benchmarks, comparing with state-of-the-art heuristics. Boubacar Diouf, Can Hantas, Albert Cohen 0001, Ozcan Ozturk 0001, Jens Palsberg |
ACM Trans. Archit. Code Optim. | 2 |