In this paper, the control strategy for a grid-connected inverter to seamlessly transition from grid following to grid forming operation with minimal interruption was proposed and verified with power hardware-in-the-loop (PHIL) simulation. The system verification included a scenario in which the main generator trips offline in a microgrid, which is difficult to verify in the real environment. In this PHIL system, the hardware of interest is a reduced-scale prototype battery inverter, while the model of interest, implemented on a real-time simulator, comprises the rest of the microgrid, including the generator, constant-power and constant-impedance loads. The power converter is interfaced to the microgrid system and the energy storage system through PHIL interfaces, providing closed-loop interaction with the simulated system. PHIL simulation of this event presents stability challenges due to the large changes in impedance in the model of interest and the hardware of interest when the generator is taken offline and the control mode of the inverter transitions. In this work, stable operation of the system is achieved using a new PHIL interface approach, and operation of the system is demonstrated using the flexibility afforded by the PHIL simulation approach.

Power hardware-in-the-loop (PHIL) simulation is a technique whereby actual power hardware is interfaced to a virtual surrounding system, simulated in real-time, through PHIL interfaces making use of power amplifiers and/or actuators. A number of interface approaches (IA) have been proposed in the literature for achieving the virtual coupling between the simulated and physical portions of the system, with the damping impedance method (DIM) often cited and employed due to its high stability and accuracy in cases in which the damping impedance can be closely matched to the impedance of the hardware of interest (HOI). However, in many cases, including many applications with power electronic converters, the impedance of the HOI is not easily represented by a passive network, as the converter controls may arbitrarily shape the impedance characteristic within the controllable bandwidth of the power converter. In this paper, a variation of the DIM IA is proposed in which the damping impedance is represented virtually as a voltage drop with the stimulus source, allowing arbitrary transfer function characteristics to be represented for the damping impedance. A variant is also proposed in which part of the damping impedance is represented virtually, and part of the damping impedance is represented explicitly with a passive network. An analysis of these approaches is provided to show the potential benefits and limitations of these approaches, illustrating these through practical examples.

Application of power hardware-in-the-loop (PHIL) simulation methodology has been increasing steadily in recent years. One of the main concerns in PHIL experiments is the tradeoff between accuracy, stability, and sensitivity of experiments, largely through the design of the PHIL interface. Recent work has included development of a general linear formulation for PHIL experiments, using the extended Lawrence architecture (ELA). Although in-depth analysis of the PHIL experiments in the context of the ELA framework have been provided, this has been limited to systems with one or more single phase or DC PHIL interfaces. The work presented herein presents the extension of linear analysis framework from single phase PHIL simulation experiments to multi-phase PHIL interface experiments. Existing PHIL interface algorithms are expressed using the ELA framework, as well as derivation of relevant transfer functions and metrics for assessment of performance. The analysis provided in this work can potentially be applied to systems with multi-phase interface algorithms implemented in different frames and an example application of a system employing interface algorithms implemented in the ’DQ’ frame is provided. Performance is analyzed in terms of accuracy (compared to the ideal system) and stability and compared to systems employing rotating frame ’abc’ type interface algorithms.

Power hardware-in-the-loop (PHIL) simulation is a technique whereby actual power hardware is interfaced to a virtual surrounding system, simulated in real-time, through PHIL interfaces making use of power amplifiers and/or actuators. A number of seemingly disparate interface algorithms (IA) have been proposed in the literature for achieving the virtual coupling between the simulated and physical portions of the system, with each presenting different strengths and shortcomings. In this work, a framework based on an architecture for bilateral teleoperation systems is described, which is suitable for the formulation of linear PHIL IAs, encompassing the majority of the existing IAs proposed in the literature. Formulations of a number of existing PHIL IAs are given in the context of the described framework. Requirements for achieving transparency with the IAs are described, and several of the existing IAs are discussed in terms of the framework, adherence to the transparency requirements, and performance. As the architecture also lends itself to the development of flexible IA modules for real-time simulators, the implementation and application of an IA module reflecting this architecture is also described.

An approach for testing the operation and coordination of medium-voltage dc solid state circuit breakers (SSCB) for shipboard power systems is described. For the considered application, the rate of rise of current during a short-circuit is limited primarily by a small cable inductance. This high rate of rise, coupled with the need to interrupt the current prior to exceeding the limits of the power electronic switches in the SSCBs, necessitates a coordinated protection scheme which can isolate the fault within a matter of microseconds. Challenges in such tests include the high-voltage, high current, high rates of change of current, and the interconnection of devices within a system. Testing of the SSCBs in a system context presents a challenge, as the MVDC system to which these are to be applied has not been realized in hardware. In order to verify the operation of the SSCBs within a system context, a combination of tests and analyses are employed, including off-line simulation, controller hardware-in-the-loop simulation, hardware testing of a single SSCB, and coordination testing with multiple SSCBs. Results are described for testing of 1 kV devices, but the approach is developed to allow for extension for devices of higher voltage ratings.

The area of modeling and simulation is a critical aspect in the basic research to commercialization and instantiation cycle. This paper reports on modeling and simulation in the context of verification, validation, and experimentation of power and energy systems and associated electrical apparatus via the utilization of power hardware in the loop (PHIL)-based strategies. PHIL is a powerful technique for testing and demonstration of systems in a rigorous and dynamic manner that is not achievable with other methodologies; however, it must only be conducted with foreknowledge of the technique and its challenges in order to realize its significant benefits. This paper reports on the state of the art in PHIL and its challenges and presents sample case studies illustrating its impact.

This paper discusses the potential role Power Hardware-in-the-Loop (PHIL) testing can play in both actual testing and derisking laboratory experiments, and shows results obtained while preparing for MW-scale testing of new AC-DC converter technology. The step-by-step approach taken by moving through phases of modeling and simulation to PHIL experiments is described, and the real time simulation for the PHIL testing including Rest-of-System and setup of experiments is addressed. An AC/DC rectifier was successfully operated in PHIL up to several hundred kilowatt to derisk planned experiments for upcoming performance testing of AC/DC converters. The PHIL experiments used in this way are a crucial part in the commissioning process and allow confidence to be gained in proper setups before the actual converter becomes available for testing.

The testing of a 500 kW photovoltaic array inverter using power hardware-in-the-loop simulation is described. A real-time simulator is used with a DC amplifier in order to emulate a photovoltaic (PV) array and an AC amplifier to emulate a power grid. The test setup is described in detail and a range of tests that were conducted on the inverter are summarized.