eBPF (extended Berkeley Packet Filter) significantly enhances observability, performance, and security within the Linux kernel, playing a pivotal role in various real-world applications. Implemented as a register-based kernel virtual machine, eBPF features a customized Instruction Set Architecture (ISA) with stringent kernel safety requirements, e.g., a limited number of instructions. This constraint necessitates substantial optimization efforts for eBPF programs to meet performance objectives. Despite the availability of compilers supporting eBPF program compilation, existing tools often overlook key optimization opportunities, resulting in suboptimal performance. In response, this paper introduces Merlin, an optimization framework leveraging customized LLVM passes and bytecode rewriting for Instruction Representation (IR) transformation and bytecode refinement. Merlin employs two primary optimization strategies, i.e., instruction merging and strength reduction. These optimizations are deployed before eBPF verification. We evaluate Merlin across 19 XDP programs (drawn from the Linux kernel, Meta, hXDP, and Cilium) and three eBPF-based systems (Sysdig, Tetragon, and Tracee, each comprising several hundred eBPF programs). The results show that all optimized programs pass the kernel verification. Meanwhile, Merlin can reduce number of instructions by 73% and runtime overhead by 60% compared with the original programs. Merlin can also improve the throughput by 0.59% and reduce the latency by 5.31%, compared to state-of-the-art technique K2, while being 106 times faster and more scalable to larger and more complex programs without additional manual efforts.

In this paper we propose an optimized bitstream compression algorithm based on LZ and a novel architecture of decompressor, the proposed algorithm improves the Compression Ratio by fully utilizing the regularity of configuration bits of CLB (Configurable Logic Box) in FPGA and using the variable length Golomb coding method. The experimental results show that the Optimized method can improve the Compression Ratio of LZSS by 32.3% for bitstream with high regularity and 10.3% for bitstream with low regularity, and our approach shows a higher flexibility than the BMC+RLE arithmetic when compressing the bitstream with high regularity for various FPGA. Moreover, we design a two-buffer-window decompressor to download the compressed bitstreams. In order to increase the throughput of the proposed decompressor, we design a multi-stage data selector in it. The post-simulation of the decompressor shows that its throughput is up to 9280 Mbps under 65nm CMOS process. And that is 4352Mbps when verified on a Virtex-5 FPGA.

In this paper, an efficient method for designing perfect reconstruction (PR) two-channel finite impulse response (FIR) filter banks with low system delay is proposed. It is based on the use of nonlinear-phase FIR function in a structure previously proposed by Phoong et al. (see IEEE Trans. Signal Processing, vol.43, p.649-64, Mar. 1995). The design problem is formulated as a complex polynomial approximation problem and is solved effectively using the Remez exchange algorithm with very low design complexity. Design examples show that filter banks with flexible stopband attenuation and system delay can be readily obtained by the proposed algorithm.

In this paper, a new approach for designing two-channel PR FIR filter banks with low system delay is proposed. It is based on the generalization of the structure previously proposed by Phoong et al. (1995). Such structurally PR filter banks are parameterized by two functions /spl alpha/(z) and /spl beta/(z) which can be chosen as linear-phase FIR or allpass functions to construct FIR/IIR filter banks with good frequency characteristics. In this paper, the more general case of using different nonlinear-phase FIR functions for /spl beta/(z) and /spl alpha/(z) is studied. As the linear-phase requirement is relaxed, higher stopband attenuation can still be achieved at low system delay. The design of the proposed low-delay filter banks is formulated as a complex polynomial approximation problem, which can be solved by the Remez exchange algorithm or analytic formula with very low complexity. The usefulness of the proposed algorithm is demonstrated by several design examples.

In this paper, a new method for designing perfect reconstruction (PR) two-channel causal stable IIR filter banks is introduced. It is based on a structure previously proposed by Phoong et al. (1995). By using a combination of allpass and linear-phase FIR functions, the bumping problem found in the conventional structural PR filter bank is significantly suppressed. The design problem is formulated as a polynomial approximation problem and is solved effectively using the Remez exchange algorithm. Filter banks with flexible stopband attenuation and system delay can readily be obtained using the proposed algorithm.

This letter proposes a method for designing a class of M-channel, causal, stable, perfect reconstruction (PR) IIR cosine-modulated filter banks (CMFB). The proposed CMFB has the same denominator for all its polyphase components in the prototype filter. Therefore, the PR condition is considerably simplified, and it is relatively simple to satisfy the PR and the causal-stable requirements of the IIR CMFB. Design examples show that the proposed IIR CMFB has sharper cutoff, higher stopband attenuation, and passband flatness than its FIR counterparts, especially when the system delay is small.