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Yu-Yin Chen

dblp:127/0530 · DBLP profile ↗
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3ranked-venue papers
2as first author
0since 2021 · last 2017
0000-0002-2583-308XORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 2 first-authorHuman-computer interaction and ubiquitous computing · 1Applied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Interconnection networks and networks-on-chip · 77% Hardware reliability and fault tolerance · 23%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Interconnection networks and networks-on-chip › routing algorithms
fault-tolerant routing
0.312017
Path-Diversity-Aware Fault-Tolerant Routing Algorithm for Network-on-Chip Systems · IEEE Trans. Parallel Distributed Syst. 2017
Interconnection networks and networks-on-chip
routing algorithms
0.312017
Path-Diversity-Aware Fault-Tolerant Routing Algorithm for Network-on-Chip Systems · IEEE Trans. Parallel Distributed Syst. 2017
Hardware reliability and fault tolerance
manufacturing defects
0.112017
Path-Diversity-Aware Fault-Tolerant Routing Algorithm for Network-on-Chip Systems · IEEE Trans. Parallel Distributed Syst. 2017
Hardware reliability and fault tolerance › soft errors
transient fault
0.112017
Path-Diversity-Aware Fault-Tolerant Routing Algorithm for Network-on-Chip Systems · IEEE Trans. Parallel Distributed Syst. 2017

Methods — techniques the papers use, named apart from their topics

saturation throughput evaluation · 0.3buffer occupancy analysis · 0.3
YearPublicationVenuePosition
2017 Path-Diversity-Aware Fault-Tolerant Routing Algorithm for Network-on-Chip Systems
abstract
Network-on-Chip (NoC) is the regular and scalable design architecture for chip multiprocessor (CMP) systems. With the increasing number of cores and the scaling of network in deep submicron (DSM) technology, the NoC systems become subject to manufacturing defects and have low production yield. Due to the fault issues, the reduction in the number of available routing paths for packet delivery may cause severe traffic congestion and even to a system crash. Therefore, the fault-tolerant routing algorithm is desired to maintain the correctness of system functionality. To overcome fault problems, conventional fault-tolerant routing algorithms employ fault information and buffer occupancy information of the local regions. However, the information only provides a limited view of traffic in the network, which still results in heavy traffic congestion. To achieve fault-resilient packet delivery and traffic balancing, this work proposes a Path-Diversity-Aware Fault-Tolerant Routing (PDA-FTR) algorithm, which simultaneously considers path diversity information and buffer information. Compared with other fault-tolerant routing algorithms, the proposed work can improve average saturation throughput by 175 percent with only 8.9 percent average area overhead and 7.1 percent average power overhead.
Yu-Yin Chen, En-Jui Chang, Hsien-Kai Hsin, Kun-Chih Chen, An-Yeu Wu
IEEE Trans. Parallel Distributed Syst.1
2012 Comparison of bistable magnetic non-linear piezoelectric energy harvester with traditional linear technique
abstract
In this paper, a piezoelectric energy harvesting device with bistable non-linear vibration combined with a switching-type interface (SSHI) are compared to the traditional linear technique. The voltage switching techniques are used to increase the output power of energy harvesting devices for low-coupled structures. However, these devices are efficient only at the resonance. The bistable non-linear technique can broaden the available bandwidth. We used the power flow and work-cycles to simplify the analysis of the non-linear vibration with switching techniques. Numerical simulations of the equivalent circuit of bistable device are shown. Finally, experimental results presented for the SSHI circuit combined with the bistable technique show more energy can be harvested and larger bandwith.
Yu-Yin Chen, Dejan Vasic, Yuan-Ping Liu, François Costa
IECON1
2006 Smart Wireless Sensor Network Powered by Random Ambient Vibrations
abstract
Over the past years, there has been a lot of efforts on the development of wireless sensor networks. However, the major constraint on broad application of wireless sensor network is still the battery lifetime on the wireless sensor nodes. In this paper, a complete power efficient sensor network system will be presented, and energy harvesting from ambient vibrations to further extend battery lifetime will also be detailed. The consideration on the power efficient design will take all aspects from hardware to network protocols. A tunable resonant frequency power harvesting device in cantilever beam form which will shift its resonant frequency to match that of the external vibrations adapting to the random ambient vibrations will also be presented to gain high energy harvesting efficiency from random ambient vibrations. With all the power saving and the power harvesting features implemented in the wireless sensor network design, years of battery lifetime on the sensor node could be expected. The experiment verification of the system and also scenario analysis on battery lifetime will also be presented in this paper.
Wen-Jong Wu, Yu-Yin Chen, Chao-Sheng Wang, Yun-Hsuan Chen
SMC3