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Yi-Fan Lin

dblp:127/0960 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2013
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer graphics and multimedia
1 paper
Image and video processing · 100%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 100%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Image and video processing › image restoration
denoising
0.212013
An Efficient Denoising Architecture for Removal of Impulse Noise in Images · IEEE Trans. Computers 2013
Image and video processing
image restoration
0.212013
An Efficient Denoising Architecture for Removal of Impulse Noise in Images · IEEE Trans. Computers 2013
Image and video processing › image restoration › image denoising › non-gaussian noise removal
impulse noise removal
0.212013
An Efficient Denoising Architecture for Removal of Impulse Noise in Images · IEEE Trans. Computers 2013
Integrated circuit design › digital circuit design
VLSI architecture
0.212013
An Efficient Denoising Architecture for Removal of Impulse Noise in Images · IEEE Trans. Computers 2013
Image and video processing › image filtering
edge-preserving filtering
0.012013
An Efficient Denoising Architecture for Removal of Impulse Noise in Images · IEEE Trans. Computers 2013

Methods — techniques the papers use, named apart from their topics

decision-tree-based detection · 0.3adaptive filtering · 0.3
YearPublicationVenuePosition
2013 An Efficient Denoising Architecture for Removal of Impulse Noise in Images
abstract
Images are often corrupted by impulse noise in the procedures of image acquisition and transmission. In this paper, we propose an efficient denoising scheme and its VLSI architecture for the removal of random-valued impulse noise. To achieve the goal of low cost, a low-complexity VLSI architecture is proposed. We employ a decision-tree-based impulse noise detector to detect the noisy pixels, and an edge-preserving filter to reconstruct the intensity values of noisy pixels. Furthermore, an adaptive technology is used to enhance the effects of removal of impulse noise. Our extensive experimental results demonstrate that the proposed technique can obtain better performances in terms of both quantitative evaluation and visual quality than the previous lower complexity methods. Moreover, the performance can be comparable to the higher,- complexity methods. The VLSI architecture of our design yields a processing rate of about 200 MHz by using TSMC 0.18 μm technology. Compared with the state-of-the-art techniques, this work can reduce memory storage by more than 99 percent. The design requires only low computational complexity and two line memory buffers. Its hardware cost is low and suitable to be applied to many real-time applications.
Chih-Yuan Lien, Chien-Chuan Huang, Pei-Yin Chen, Yi-Fan Lin
IEEE Trans. Computers4