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Jelle Van Rethy

dblp:127/8010 · DBLP profile ↗
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3ranked-venue papers
1as first author
0since 2021 · last 2015
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 3 · 1 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 44% Emerging computing paradigms · 44% Embedded and real-time systems · 13%

Topics — the 3 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Emerging computing paradigms
beyond-CMOS computing
0.212013
Sacha: the Stanford carbon nanotube controlled handshaking robot · DAC 2013
Integrated circuit design › analog and mixed-signal circuits › analog circuit design
sensor interface circuits
0.212013
Sacha: the Stanford carbon nanotube controlled handshaking robot · DAC 2013
Embedded and real-time systems › sensor systems
sensor interface
0.012013
Sacha: the Stanford carbon nanotube controlled handshaking robot · DAC 2013

Methods — techniques the papers use, named apart from their topics

all-digital capacitive sensing · 0.2
YearPublicationVenuePosition
2015 Time-based sensor interface circuits in carbon nanotube technology
abstract
Carbon nanotube technology is a promising technology to further reduce the energy consumption in electronics, as it is projected to achieve an order of magnitude improvement in energy-delay product compared to Silicon CMOS at highly-scaled technology nodes. In addition, CNTs are excellent candidates to be functionalized as sensors, and can potentially improve the energy efficiency of sensors and sensor interfaces for future autonomy-demanding applications. This paper presents an overview of time-based sensor interfaces implemented in a CNT technology. Time-based sensor interfaces yield highly-digital architectures, allowing for scalable and robust designs. All of the presented CNFET-based sensor interface circuits have been fabricated in a VLSI-compatible manner and have been validated through measurements.
Georges Gielen, Jelle Van Rethy, Max M. Shulaker, Gage Hills, H.-S. Philip Wong, Subhasish Mitra
ISCAS2
2013 Sacha: the Stanford carbon nanotube controlled handshaking robot
abstract
Low-power applications, such as sensing, are becoming increasingly important and demanding in terms of minimizing energy consumption, driving the search for new and innovative interface architectures and technologies. Carbon Nanotube FETs (CNFETs) are excellent candidates for further energy reduction, as CNFET-based digital circuits are projected to potentially achieve an order of magnitude improvement in energy-delay product at highly scaled technology nodes. This paper presents an overview of the first demonstration of a complete sub-system, a sensor interface circuit, implemented entirely using CNFETs. The demonstrated sub-system is an all-digital capacitive sensor to digital converter. The CNFET sensor interface is demonstrated by using the CNFET circuitry to interface with a sensor used to control a handshaking robot.
Max M. Shulaker, Jelle Van Rethy, Gage Hills, Hong-Yu Chen, Georges Gielen, H.-S. Philip Wong, Subhasish Mitra
DAC2
2013 A low-power and low-voltage BBPLL-based sensor interface in 130nm CMOS for wireless sensor networks
abstract
A low-power and low-voltage BBPLL-based sensor interface for resistive sensors in Wireless Sensor Networks is presented. The interface is optimized towards low power, fast start-up time and fast conversion time, making it primarily useful in autonomous wireless sensor networks. The interface is time/frequency-based, making it less sensitive to lower supply voltages and other analog non-idealities, whereas conventional amplitude-based interfaces do suffer largely from these non-idealities, especially in smaller CMOS technologies. The sensor-to-digital conversion is based on the locking behavior of a digital PLL, which also includes transient behavior after start-up. Several techniques such as VDDscaling, coarse and fine tuning and pulse-width modulated feedback are implemented to decrease the transient and acquisition time and the power to optimize the total energy consumption. In this way the sensor interface consumes only 61µW from a 0.8V DC power supply with a one-sample conversion time of less than 20µs worst-case. The sensor interface is designed and implemented in UMC130 CMOS technology and outputs 8 bit parallel with 7.72 ENOB. Due to its fast start-up time, fast conversion time and low power consumption, it only consumes 5.79 pJ/bit-conversion, which is a state-of-the-art energy efficiency compared to recent resistive sensor interfaces.
Jelle Van Rethy, Hans Danneels, Valentijn De Smedt, Wim Dehaene, Georges Gielen
DATE1