EDBT 2026 Demo / reviewers in the wild / expert
Li Dang
dblp:128/6184
· DBLP profile ↗
6ranked-venue papers
4as first author
6since 2021 · last 2026
—ORCID · conflict
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 4 · 3 first-author · 4 since 2021Human-computer interaction and ubiquitous computing · 1 · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 first-author · 1 since 2021
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | A PN-Assisted Dynamic-Window Interstage Gain Calibration for Pipeline-SAR ADCs
Li Dang, Hongzhi Liang, Ruixue Ding, Shubin Liu 0001, Zhangming Zhu |
ISCAS | 1 |
| 2026 | A 1GS/s 8b 2× Time-Interleaved SAR ADC with Speed-Enhanced Techniques in 65nm CMOS
Li Dang, Yaoxin Zhang, Hongzhi Liang, Ruixue Ding, Shubin Liu 0001, Zhangming Zhu |
ISCAS | 1 |
| 2026 | A 64GS/s 8b 64× Time-Interleaved SAR ADC Achieving 33.8dB SNDR at 26GHz in 28nm CMOS
Yixiao Luo, Hongzhi Liang, Li Dang, Ruixue Ding, Shubin Liu 0001, Zhangming Zhu |
ISCAS | 5 |
| 2025 | A reference-free and derivative-insensitive all-digital calibration technique for timing-skew in TI-ADCs
Li Dang, Shubin Liu 0001, Ruixue Ding, Hongzhi Liang, Haolin Han, Zhangming Zhu |
Sci. China Inf. Sci. | 1 |
| 2024 | Incentive Mechanism of Blockchain-Based Reverse Auction for Federated LearningabstractFederated learning is a novel machine learning paradigm in which the model is trained on local data by distributed clients. Most of the current research on federated learning assumes that clients are unconditionally providing data and training models, and little consideration has been given to how to incentivize clients with high-quality data to participate in the model training task. Therefore, this paper proposes a blockchain-based federated learning incentive mechanism combining data quality verification and reverse auction. Firstly, by verifying the quality of client data, the client with high-quality data that meets the task requirements is selected, and then the client sends its bid for the task to the reverse auction smart contract. Secondly, some clients with the best performance in different training phases are selected to participate in the task training using smart contracts, and a certain number of clients are selected to form a committee among the unselected participants. The committee members are responsible for validating the local model parameters of the clients while receiving validation rewards. Finally, we conduct simulation experiments on two datasets separately, and the experimental results demonstrate the effectiveness of our proposal. Bo Cui 0005, Li Dang |
CSCWD | 2 |
| 2024 | A High Accuracy and Bandwidth Digital Background Calibration Technique for Timing Skew in TI-ADCsabstractThis paper presents a digital background timing-skew calibration technique with high accuracy and bandwidth in time-interleaved (TI) analog-to-digital converters (ADCs). Compared with other calibration works, it features three highlights. Firstly, the proposed DCSD-based step-by-step and grouping calibration scheme can effectively improve the correction accuracy by minimizing the root mean square (RMS) value of the detected timing skews. Secondly, the linear compensation for a 13-taps FIR filter and the decimation-calibration-interpolation working pattern are used to expand the calibration effective bandwidth to the whole first Nyquist zone from different perspectives. Thirdly, the binary search is employed, instead of LMS algorithm, in order to meet the compensation requirement for FIR filter and improve the convergence speed and accuracy significantly in timing-skew detection. As a result, the proposed technique achieves the widest calibration bandwidth and higher accuracy compared to other fully digital calibration techniques while having the great convergence speed. Simulation model in MATLAB and FPGA-based hardware verification are employed to demonstrate its significant improvement on the performance and hardware overhead of the TI-ADCs. Finally, the proposed technique is employed in a 10-bit 2.5 GS/s 4-way TI-SAR ADC fabricated by standard CMOS 28nm process. The measurement results show that with the proposed technique, the SFDR and SNDR are improved by 18.9 and 17.9 dB at Nyquist frequency, respectively. Li Dang, Shubin Liu 0001, Ruixue Ding, Yi Shen 0007, Zhangming Zhu |
IEEE Trans. Circuits Syst. I Regul. Pap. | 1 |