Demo Data from EDBT 2026 / reviewers in the wild / expert
Chi-Ping Yang
dblp:129/2151
· DBLP profile ↗
3ranked-venue papers
0as first author
0since 2021 · last 2015
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3Software engineering, systems software and programming languages · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Performance modeling and evaluation · 77% Integrated circuit design · 12% Energy-efficient computing · 12% |
Topics — the 4 heaviest of 4, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Performance modeling and evaluation › simulation › thermal simulation
3d thermal simulation |
0.2 | 1 | 2015 | LUTSim: A Look-Up Table-Based Thermal Simulator for 3-D ICs · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2015 |
Performance modeling and evaluation › simulation
thermal simulation |
0.2 | 1 | 2015 | LUTSim: A Look-Up Table-Based Thermal Simulator for 3-D ICs · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2015 |
Integrated circuit design
3d integration |
0.1 | 1 | 2015 | LUTSim: A Look-Up Table-Based Thermal Simulator for 3-D ICs · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2015 |
Energy-efficient computing
thermal management |
0.1 | 1 | 2015 | LUTSim: A Look-Up Table-Based Thermal Simulator for 3-D ICs · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2015 |
Methods — techniques the papers use, named apart from their topics
matrix solver · 0.2look-up table approach · 0.2incremental thermal updating · 0.2
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2015 | LUTSim: A Look-Up Table-Based Thermal Simulator for 3-D ICsabstractTo sustain Moore's law, three-dimensional integrated circuit (3-D IC) is a promising solution to achieve high performance and low cost targets. However, its operating temperature is higher than that of a 2-D IC because of its high power density of stacked dies and ill of heat dissipation capability. Therefore, on-chip thermal effects have become major concerns of 3-D ICs. Utilizing look-up table approach, this paper, LUTSim, provides two thermal simulation engines, I-LUTSim and S-LUTSim, to efficiently calculate the thermal profile of a 3-D IC. I-LUTSim is suitable for full-chip thermal analysis, and S-LUTSim is suited for incremental-thermal updating. With utilizing the prebuilt tables, compared with a commercial tool ANSYS, the absolute error of I-LUTSim is less than 0.29%. Moreover, with negligible loss of accuracy, I-LUTSim can be 38.8 times faster than a well-known matrix solver SuperLU for performing full-chip thermal simulation. Besides, S-LUTSim can be over 1.05 million times faster than SuperLU for adjusting the thermal profile after inserting/removing a through silicon via. Yu-Min Lee, Chi-Wen Pan, Pei-Yu Huang, Chi-Ping Yang |
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. | 4 |
| 2013 | I-LUTSim: An iterative look-up table based thermal simulator for 3-D ICsabstractThis work presents an iterative look-up table based thermal simulator, I-LUTSim, to efficiently estimate the temperature profile of three-dimensional integrated circuits. I-LUTSim includes two stages. First, the pre-process stage constructs thermal impulse response tables. Then, the simulation stage iteratively calculates the temperature profile via the table lookup. With this two-stage scheme, the maximum absolute error of I-LUTSim is less than 0.41% compared with that of a commercial tool ANSYS. Moreover, I-LUTSim is at least an order of magnitude faster than a fast matrix solver SuperLU [1] for the full-chip temperature simulation. Chi-Wen Pan, Yu-Min Lee, Pei-Yu Huang, Chi-Ping Yang, Chang-Tzu Lin, Chia-Hsin Lee, Yung-Fa Chou, Ding-Ming Kwai |
ASP-DAC | 4 |
| 2013 | NUMANA: a hybrid <u>num</u>erical and <u>ana</u>lytical thermal simulator for 3-D ICsabstractBy combining analytical and numerical simulation techniques, this work develops a hybrid thermal simulator, NUMANA, which can effectively deal with complicated material structures, to estimate the temperature profile of a 3-D IC. Compared with a commercial tool, ANSYS, its maximum relative error is only 1.84%. Compared with a well known linear system solver, SuperLU [1], it can achieve orders of magnitude speedup. Yu-Min Lee, Tsung-Heng Wu, Pei-Yu Huang, Chi-Ping Yang |
DATE | 4 |