Demo Data from EDBT 2026 / reviewers in the wild / expert
Indranil Roy
dblp:129/4200
· DBLP profile ↗
8ranked-venue papers
8as first author
0since 2021 · last 2020
—ORCID · conflict
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 7 · 7 first-authorApplied, interdisciplinary, general and emerging computing · 1 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Hardware accelerators and domain-specific architectures · 33% Electronic design automation · 33% Reconfigurable computing and FPGAs · 33% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Hardware accelerators and domain-specific architectures › pattern matching accelerator
automata processor |
0.4 | 1 | 2019 | Evaluating High Performance Pattern Matching on the Automata Processor · IEEE Trans. Computers 2019 |
Electronic design automation › hardware verification and test
pattern matching |
0.4 | 1 | 2019 | Evaluating High Performance Pattern Matching on the Automata Processor · IEEE Trans. Computers 2019 |
Reconfigurable computing and FPGAs
reconfigurable computing |
0.4 | 1 | 2019 | Evaluating High Performance Pattern Matching on the Automata Processor · IEEE Trans. Computers 2019 |
Methods — techniques the papers use, named apart from their topics
NFA emulation · 0.4FPGA implementation · 0.4
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2020 | Interval stabbing on the Automata Processor
Indranil Roy, Ankit Srivastava, Matt Grimm, Srinivas Aluru |
J. Parallel Distributed Comput. | 1 |
| 2019 | Efficient Any Source Overlay Multicast In CRT-Based P2P Networks - A Capacity-Constrained ApproachabstractIn this work, we have considered designing a highly efficient capacity-constrained overlay multicast protocol; it is designed specifically for an existing Chinese Remainder Theorem (CRT) - based structured P2P architecture [9]. Such an architecture has been the choice for its structural advantages over DHT-based architectures. It is worth mentioning its most important advantage from the viewpoint of speed of communication, that is its diameter, which is only 3 overlay hops. The protocol is not restricted to a single data source and it incorporates peer heterogeneity as well. We have also designed another any source capacity-constrained multicast protocol that incorporates the unique idea of transforming the multicast problem to a broadcast one [10]. We have compared analytically the performance of the two protocols; it has led to the observation that use of this unique idea [10] cannot take advantage of all structural advantages of a CRT-based system resulting in decrease in performance. However, the proposed multicast source discovery protocol has used this unique idea offering good performance. Indranil Roy, Koushik Maddali, Swathi Kaluvakuri, Banafsheh Rekabdar, Ziping Liu, Bidyut Gupta, Narayan C. Debnath |
INDIN | 1 |
| 2019 | Evaluating High Performance Pattern Matching on the Automata ProcessorabstractIn this paper, we study the acceleration of applications that identify all the occurrences of thousands of string-patterns in an input data-stream using the Automata Processor (AP). For this evaluation, we use two applications from two fields, namely, cybersecurity and bioinformatics. The first application, called Fast-SNAP, scans network data for 4312 signatures of intrusion derived from the popular open-source Snort database. Using the resources of a single AP-board, Fast-SNAP can scan for all these signatures at 1 Gbps. The second application, called PROTOMATA, looks for all the occurrences of 1,309 motifs from the PROSITE database in protein sequences. PROTOMATA is up to 68 times faster than the state-of-the-art CPU implementation. As a comparison, we emulate the execution of the same NFAs by programming FPGAs using state-of-the-art techniques. We find that the performance derived by using the resources of a single AP-board, which houses 32 AP-chips, is comparable to that of the resources of five to six large FPGAs. The design techniques used in this paper are generic and may be applicable to the development of similar applications on the AP. Indranil Roy, Ankit Srivastava, Matt Grimm, Marziyeh Nourian, Michela Becchi, Srinivas Aluru |
IEEE Trans. Computers | 1 |
| 2016 | Programming Techniques for the Automata ProcessorabstractThe Micron Automata Processor (AP) is a novel co-processor accelerator that supports the parallel execution of multiple Nondeterministic Finite Automata (NFA) programmed directly into hardware over a single data-stream. In this paper, we present a number of programming techniques to develop automata that execute efficiently on this processor. First, we present general techniques to transform NFAs defined in their classical representation to the representation used by the AP, and optimize the same. Then, we present automata development techniques using simple but powerful generic building blocks. All the above techniques are generic in nature and can be useful to application developers working on this new upcoming co-processor architecture. Indranil Roy, Ankit Srivastava, Srinivas Aluru |
ICPP | 1 |
| 2016 | Algorithmic Techniques for Solving Graph Problems on the Automata ProcessorabstractThe Automata Processor is a new accelerator technology that supports direct hardware implementation of a set of non-deterministic finite automata over a streaming input, and is designed for complex string pattern matching applications. In this paper, we broaden the scope of this architecture beyond its primary design goal, by developing algorithmic techniques to solve problems on unweighted graphs. We present a strategy to represent nodes and edges in a graph using strings, and use this transformation to develop algorithms for several classic graph problems including finding Hamiltonian paths and cycles, connected components, and breadth-first search. Our algorithms rely on a core set of automata building blocks which we designed for this purpose, and illustrate various design considerations that developers must bear in mind when harnessing this new technology. We expect that this work provides the foundations for solving graph problems using the Automata Processor. Indranil Roy, Nagakishore Jammula, Srinivas Aluru |
IPDPS | 1 |
| 2016 | High Performance Pattern Matching Using the Automata ProcessorabstractIn this paper, we study the acceleration of applications that require searching for all occurrences of thousands of string-patterns in an input data-stream, using the Automata Processor (AP). For this purpose, we use two applications from two fields, namely, network security and bioinformatics. The first application, called Fast-SNAP (for Fast-SNort using AP), scans network data for 4312 signatures of intrusion derived from the popular open-source Snort database. Using the resources of a single AP board, Fast-SNAP can scan for all these signatures at 10.3 Gbps. The second application, called PROTOMATA (for PROTein autOMATA), looks for all occurrences of 1308 protein motifs from the PROSITE database in protein sequences. PROTOMATA is up to half a million times faster than its single-CPU-based counterpart. The techniques developed to program these applications may be useful in the design and development of similar applications using this new hardware accelerator. Indranil Roy, Ankit Srivastava, Marziyeh Nourian, Michela Becchi, Srinivas Aluru |
IPDPS | 1 |
| 2016 | Discovering Motifs in Biological Sequences Using the Micron Automata ProcessorabstractFinding approximately conserved sequences, called motifs, across multiple DNA or protein sequences is an important problem in computational biology. In this paper, we consider the (l, d) motif search problem of identifying one or more motifs of length l present in at least q of the n given sequences, with each occurrence differing from the motif in at most d substitutions. The problem is known to be NP-complete, and the largest solved instance reported to date is (26,11). We propose a novel algorithm for the (l,d) motif search problem using streaming execution over a large set of non-deterministic finite automata (NFA). This solution is designed to take advantage of the micron automata processor, a new technology close to deployment that can simultaneously execute multiple NFA in parallel. We demonstrate the capability for solving much larger instances of the (l, d) motif search problem using the resources available within a single automata processor board, by estimating run-times for problem instances (39,18) and (40,17). The paper serves as a useful guide to solving problems using this new accelerator technology. Indranil Roy, Srinivas Aluru |
IEEE ACM Trans. Comput. Biol. Bioinform. | 1 |
| 2014 | Finding Motifs in Biological Sequences Using the Micron Automata ProcessorabstractFinding approximately conserved sequences, called motifs, across multiple DNA or protein sequences is an important problem in computational biology. In this paper, we consider the (l, d) motif search problem of identifying one or more motifs of length l present in at least q of the n given sequences, with each occurrence differing from the motif in at most d substitutions. The problem is known to be NP-hard, and the largest solved instance reported to date is (26, 11). We propose a novel algorithm for the (l, d) motif search problem using streaming execution over a large set of Non-deterministic Finite Automata (NFA). This solution is designed to take advantage of the Micron Automata Processor, a new technology close to deployment that can simultaneously execute multiple NFA in parallel. We estimate the run-time for the (39, 18) and (40, 17) problem instances using the resources available within a single Automata Processor board. In addition to solving larger instances of the (l, d) motif search problem, the paper serves as a useful guide to solving problems using this new accelerator technology. Indranil Roy, Srinivas Aluru |
IPDPS | 1 |