Flexible electronics are a possible alternative for portable consumer applications and have many advantages. However, the circuit design for flexible electronics is still challenging, especially for sensitive analog circuits. Due to the different properties of flexible thin-film transistors (TFTs), conventional CMOS design techniques cannot be used directly on flexible electronics. Significant parameter variations and degradation effects of flexible TFTs further increase difficulties for circuit designers. In this paper, a reliability-aware circuit sizing approach is proposed for the analog circuits with flexible TFTs. The process variation, bending, and degradation effects of flexible TFTs in the optimization flow are considered simultaneously. Instead of optimizing the fresh yield and lifetime yield separately, a unified optimization approach is proposed to consider the two yield issues simultaneously. As shown in the experimental results, the proposed approach can further improve the lifetime yield and significantly reduce the design overhead with a fast computation time.

Flexible electronics are possible alternative for portable consumer applications with many advantages. However, the circuit design for flexible electronics is still challenging, especially for sensitive analog circuits. Significant parameter variations and bending effects of flexible TFTs further increase the difficulties for circuit designers. In this paper, an automatic circuit sizing technique is proposed for the analog circuits with flexible TFTs. The process variation and bending effects of flexible TFTs are considered simultaneously in the optimization flow. As shown in the experimental results, the proposed approach can further improve the design yield and significantly reduce the design overhead.