EDBT 2026 Demo / reviewers in the wild / expert
Rahul Dutta
dblp:129/9390
· DBLP profile ↗
7ranked-venue papers
2as first author
4since 2021 · last 2026
—ORCID · conflict
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 3 · 3 since 2021Human-computer interaction and ubiquitous computing · 3 · 1 first-author · 1 since 2021Graphics, computer vision, multimedia, augmented reality and games · 1 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 1 · 1 since 2021
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2026 | Learning to Place Chiplets: A Multi-Objective Reinforcement Learning ApproachabstractAs heterogeneous systems scale, traditional rule-based and stochastic methods used for chip placement face limitations in convergence, scalability, and thermal management. To address these challenges, we propose a reinforcement learning (RL) framework with multi-objective optimization, employing a customized reward shaping method to minimize interconnect wirelength and improve thermal distribution. We applied our approach to two generic use cases in 2.5D advanced packaging - a 4-chiplet RDL system and a multi-GPU system. Our results outperformed the state-of-the-art methods like Bayesian optimization (BO) by up to \(40\%\) in wirelength reduction with 4°C thermal improvements. Richard Chang 0002, Partha Pratim Kundu, Jun Liu 0092, Dingjie Lu, Sezin Kircali Ata, Yubo Hou, Jie Wang 0042, Gen Liang Lim, Sridhar Narayanaswamy, Mihai Rotaru 0001, Rahul Dutta, Ashish James |
ACM Great Lakes Symposium on VLSI | 11 |
| 2026 | FAPlace: Joint Optimization of Chiplet Placement and Interposer Footprint for 2.5D SystemsabstractThe placement of chiplets on a silicon interposer is a pivotal step in 2.5D system integration, yet existing placement approaches typically assume a pre-defined interposer footprint. This creates a circular dependency: the optimal footprint cannot be known without first solving the placement, while the placement itself is constrained by the given dimensions. An undersized interposer may exclude feasible placements, while an oversized one yields unnecessarily sparse solutions. Moreover, even when the footprint area is minimized, few existing approaches explicitly control the interposer’s aspect ratio. To jointly address these challenges, we propose FAPlace, a footprint aware mask guided sequential placement framework. FAPlace operates on a sufficiently large canvas, eliminating the circular dependency by allowing the optimal interposer footprint to emerge as an output of the optimization rather than a pre-specified input. At its core is a novel footprint mask that fuses area compactness with an aspect ratio penalty into a unified spatial cost map. Integrated with wirelength and thermal guidance masks, FAPlace delivers holistic multi-physics optimization in a deterministic, single pass process. Experimental results demonstrate that FAPlace reduces wirelength and footprint area while achieving near-unity aspect ratios, without compromising on thermal performance. Yubo Hou, Sezin Kircali Ata, Gen Liang Lim, Richard Chang 0002, Mihai Rotaru 0001, Rahul Dutta, Ashish James |
ACM Great Lakes Symposium on VLSI | 6 |
| 2022 | Bayesian Deep Active Learning for Analog Circuit Performance ClassificationabstractComputationally intensive simulations have made analog circuit sizing challenging for complicated analog circuit performance characterization. Accurate yet computationally efficient data-driven models of circuit performance can potentially accelerate the design and verification process. However, as analog circuits are designed under strict functional and technology constraints, there is a scarcity of data for analog circuit performance classification, posing challenges to data-driven approaches; acquiring more data typically involves running expensive and time consuming simulations. We propose Bayesian Deep Active Learning (BDAL) to learn models using fewer simulations, by iteratively selecting a small number of informative samples to label based on the model uncertainty. Bayesian neural networks used in the BDAL framework are better able to model weight uncertainty while being sufficiently expressive to model complex circuits. Compared with the state-of-the-art approaches, the proposed BDAL method can obtain better classification performance with much fewer number of simulations. Experiments on four diverse analog circuits demonstrate BDAL can achieve significant reduction in data requirement and obtain similar performance with much less labeled data for analog circuit performance classification. Lining Zhang, Salahuddin Raju, Ashish James, Rahul Dutta, Gregoire Fournier, Damien Lancry, Kevin Tshun Chuan Chai, Vijay Chandrasekhar 0001, Chuan-Sheng Foo |
ISCAS | 4 |
| 2022 | Physics Informed Neural Network using Finite Difference MethodabstractIn recent engineering applications using deep learning, physics-informed neural network (PINN) is a new development as it can exploit the underlying physics of engineering systems. The novelty of PINN lies in the use of partial differential equations (PDE) for the loss function. Most PINNs are implemented using automatic differentiation (AD) for training the PDE loss functions. A lesser well-known study is the use of finite difference method (FDM) as an alternative. Unlike an AD based PINN, an immediate benefit of using a FDM based PINN is low implementation cost. In this paper, we propose the use of finite difference method for estimating the PDE loss functions in PINN. Our work is inspired by computational analysis in electromagnetic systems that traditionally solve Laplace’s equation using successive over-relaxation. In the case of Laplace’s equation, our PINN approach can be seen as taking the Laplacian filter response of the neural network output as the loss function. Thus, the implementation of PINN can be very simple. In our experiments, we tested PINN on Laplace’s equation and Burger’s equation. We showed that using FDM, PINN consistently outperforms non-PINN based deep learning. When comparing to AD based PINNs, we showed that our method is faster to compute as well as on par in terms of error reduction. Kart-Leong Lim, Rahul Dutta, Mihai Rotaru 0001 |
SMC | 2 |
| 2020 | FireBird: A Fire Alert and Live Fire Monitoring System Based on Social Media Contribution
Arijit Das, Rahul Dutta, Ayan Dey, Thomas Tamisier, Sukriti Bhattacharya |
CDVE | 2 |
| 2020 | Blockchain vs GDPR in Collaborative Data Governance
Rahul Dutta, Arijit Das, Ayan Dey, Sukriti Bhattacharya |
CDVE | 1 |
| 2014 | Video alignment to a common referenceabstractHandheld videos include unintentional motion (jitter) and often intentional motion (pan and/or zoom). Human viewers prefer to see jitter removed, creating a smoothly moving camera. For video analysis, in contrast, aligning to a fixed stable background is sometimes preferable. This paper presents an algorithm that removes both forms of motion using a novel and efficient way of tracking background points while ignoring moving foreground points. The approach is related to image mosaicing, but the result is a video rather than an enlarged still image. It is also related to multiple object tracking approaches, but simpler since moving objects need not be explicitly tracked. The algorithm presented takes as input a video and returns one or several stabilized videos. Videos are broken into parts when the algorithm detects the background changing and it becomes necessary to fix upon a new background. Our approach assumes the person holding the camera is standing in one place and that objects in motion do not dominate the image. Our algorithm performs better than several previously published approaches when compared on 1,401 handheld videos from the recently released Point-and-Shoot Face Recognition Challenge (PASC). The source code for this algorithm is being made available. Rahul Dutta, Bruce A. Draper, J. Ross Beveridge |
WACV | 1 |