Demo Data from EDBT 2026 / reviewers in the wild / expert
Chris Browy
dblp:13/11210
· DBLP profile ↗
1ranked-venue papers
0as first author
0since 2021 · last 2012
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 87% Integrated circuit design · 13% |
Topics — the 3 heaviest of 3, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › hardware verification and test
hardware verification |
0.1 | 1 | 2012 | Improving gate-level simulation accuracy when unknowns exist · DAC 2012 |
Electronic design automation › hardware verification and test
logic simulation |
0.1 | 1 | 2012 | Improving gate-level simulation accuracy when unknowns exist · DAC 2012 |
Integrated circuit design
digital circuit design |
0.0 | 1 | 2012 | Improving gate-level simulation accuracy when unknowns exist · DAC 2012 |
Methods — techniques the papers use, named apart from their topics
fan-in cone tracing · 0.1auxiliary code generation · 0.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2012 | Improving gate-level simulation accuracy when unknowns existabstractUnknown values (Xs) may exist in a design due to uninitialized registers or blocks that are powered down. Due to X-pessimism in gate-level logic simulation, such Xs cannot be handled correctly, producing false Xs that result in inaccurate simulation values. To improve gate-level simulation accuracy when Xs exist, we first trace the fan-in cone of Xs to check whether they are real. For the Xs that are not real, we extract small sub-circuits responsible for creating the false Xs. We then generate auxiliary code to repair gate-level simulation by replacing the Xs with the correct values. Our experimental results on commercial designs show that the proposed methods are both effective and efficient. Kai-Hui Chang, Chris Browy |
DAC | 2 |