In this paper we propose a semi-random technique for the generation of a class of eIRA codes (a popular class of irregular LDPC codes that can be encoded in linear time) suited to partially parallel decoder implementations. The suggested technique tries to avoid both low-weight codewords and nearcodewords, which limit the performance of the belief propagation decoder. Its effectiveness is verified by comparison with literature results. The obtained codes are versatile, in terms of code-rate and block length, and they are characterized by a low error floor.

In this paper we propose a technique to implement in a parallel fashion a turbo decoder based on an arbitrary permutation, and to expand its interleaver in order to produce a family of prunable S-random interleavers suitable for parallel implementations. We show that the spread properties of the obtained interleavers are almost optimal and we prove by simulation that they are very competitive in terms of error floor performance. A few details on the decoder architecture are also provided.

In this paper we discuss the design of linear time encodable extended irregular repeat-accumulate (eIRA) codes for bit-interleaved coded modulation (BICM) systems. We interpret eIRA codes as a particular instance of the recently introduced multi-edge type (MET) low-density parity-check (LDPC) codes. This allows us to take into account during the design step both the systematic nature of these codes and the different level of protection given to each bit by the choice of input alphabet and mapping function. Furthermore, we extend to the eIRA-BICM case the method used by Roumy et al., IEEE Trans. Inf. Theory, 2004, to optimize LDPC codes for the binary input AWGN (bi-AWGN) channel. This method is based on EXIT functions and leads to a linear program. Using this method we design capacity-approaching eIRA codes for 4PAM and 8PSK. For both short and long block lengths these codes have performance approximately 0.1 dB worse than LDPC codes optimized with density evolution and with similar decoding complexity.

In this paper we propose a semi-random technique to design irregular LDPC codes with low error floor. In particular, the suggested technique is related to a popular class of irregular LDPC codes that can be encoded in linear time, and tries to avoid both low-weight codewords and near-codewords, which limit the performance of the belief propagation decoder. Besides, an easy and effective rule to design puncturing patterns for this class of LDPC codes is provided. The effectiveness of the new design criteria is proved by comparison with literature results.

In this paper, we propose two techniques to design good S-random interleavers, to be used in parallel and serially concatenated codes with interleavers. The interleavers designed according to these algorithms can be shortened, in order to support different block lengths in such a way that all the permutations obtained by pruning, when employed in a parallel turbo decoder, are collision-free. The first technique, suitable for short and medium interleavers, guarantees the same performance of nonparallel interleavers in terms of spreading properties, simulated frame-error probabilities, and obtainable minimum distance of the actual codes. The second algorithm, to be used for large block lengths, permits achieving high degrees of parallelism at the price of a slight degradation of the spread properties, and also to change the degree of parallelism on-the-fly. The operations of a parallel turbo decoder employing these interleavers are described, and an example of the advantages of the proposed techniques is provided in a realistic system framework.

In this paper, we propose two techniques to design good S-random interleavers, to be used in parallel and serially concatenated codes with interleavers. The interleavers designed according to these algorithms can be shortened in order to support different block lengths: all the permutations obtained by pruning, when employed in a parallel turbo decoder, are collision-free.