Fault-tolerant quantum computing (FTQC) uses quantum error correction (QEC) codes to execute large-scale quantum programs on noisy quantum computers. Quantum low-density parity-check (qLDPC) codes are promising as they use an order of magnitude fewer qubits than widely used surface codes. However, as qLDPC codes support only a limited set of operations, they require programs to be decomposed into many qLDPC-supported operations. This prohibitively increases the execution time of FTQC applications to tens of days, hindering the practical viability of qLDPC codes.

We introduce VoiceBBQ 1 , a spoken extension of the BBQ (Bias Benchmark for Question answering) -a dataset that measures social bias by presenting ambiguous or disambiguated contexts followed by questions that may elicit stereotypical responses.Due to the nature of speech modality, social bias in Spoken Language Models (SLMs) can emerge from two distinct sources: 1) content aspect and 2) acoustic aspect.The dataset converts every BBQ context into controlled voice conditions, enabling per-axis accuracy, bias, and consistency scores that remain comparable to the original text benchmark.Using VoiceBBQ, we evaluate two SLMs-LLaMA-Omni and Qwen2-Audio-and observe architectural contrasts: LLaMA-Omni retains strong acoustic sensitivity, amplifying gender and accent bias, whereas Qwen2-Audio substantially dampens these cues while preserving content fidelity.VoiceBBQ thus provides a compact, dropin testbed for jointly diagnosing content and acoustic bias across spoken language models.

Superconducting computing using single flux quantum (SFQ) technology has been recognized as a promising post-Moore's law era technology thanks to its extremely low power and high performance.Therefore, many researchers have proposed various SFQbased circuits (e.g., ALU, register file) and architectures (e.g., NPU, CPU) to exploit the potential.However, due to the absence of a reliable and high-frequency clocking scheme, general SFQ circuits cannot operate at high frequencies, making all architectural efforts for high-performance SFQ computing ineffective.In this paper, we propose SuperSFQ, a new design methodology for SFQ hardware that unlocks the high-frequency potential of SFQ technology by co-designing the clocking scheme, circuitry, and architecture.First, we propose SuperClocking, a new clocking scheme that enables high frequency in general SFQ hardware.Second, we implement an SFQ-based synchronizer to realize the reliable operation of SuperClocking.Finally, we provide two architectural design guidelines and corresponding solutions to ensure the functional correctness of SuperClocking in general SFQ devices.By applying our clocking scheme, synchronizer, and guidelines to the latest general-purpose SFQ CPU, SuperSFQ achieves up to 62.5 times higher frequency and improves single-thread and multithread performance by 17 and 62.5 times, respectively, compared to conventional designs, with only 34.4% Josephson junction overhead.In addition, to demonstrate the generality of SuperSFQ, we apply SuperSFQ to 48 different benchmark circuits, achieving 88.5 times higher frequency compared to conventional designs, on average.

The ultimate goal of fault-tolerant quantum computing (FTQC) is to run practical applications.Due to the long execution time of practical workloads, an FTQC system must operate reliably for multiple days by correcting the errors of noisy qubits.However, drifts of error sources increase qubit error rates during execution (i.e., error drift), limiting the reliable execution time.Even worse, existing error-drift-handling methods cannot execute long-running workloads as they collapse the qubit states or fail to suppress errors.In this paper, we propose LANCER, a novel accurate and nondestructive calibration method for reliable execution under error drifts.We observe that only a subset of qubits store quantum states during execution.Based on the observation, we periodically stall the program and migrate the quantum states temporarily to idle qubits, enabling accurate calibrations without losing the states.However, this idea faces two major challenges: (1) crosstalk between running and calibrating qubits and (2) huge latency overhead due to stalls when the quantum states are migrated to idle qubits.We propose three solutions to resolve these challenges.First, we mitigate the crosstalk by toggling the frequencies of running qubits to separate them from the frequencies of calibrating qubits.Second, we reduce the latency overhead by utilizing the inherent idle times in the fault-tolerant quantum gate.Lastly, we further reduce the latency overhead by re-designing qubit layout to enable the execution even when the quantum states are migrated to idle qubits.The evaluation shows that LANCER enables the execution of 95 times larger programs (i.e., larger number of gates) compared to the baseline, with negligible latency and qubit overhead (4.3% and 4.0%, respectively).

A million qubit-scale quantum computer is essential to realize the quantum supremacy. Modern large-scale quantum computers integrate multiple quantum computers located in dilution refrigerators (DR) to overcome each DR's unscaling cooling budget. However, a large-scale multi-DR quantum computer introduces its unique challenges (i.e., slow and erroneous inter-DR entanglement, increased qubit scale), and they make the baseline error handling mechanism ineffective by increasing the number of gate operations and the inter-DR communication latency to decode and correct errors. Without resolving these challenges, it is impossible to realize a fault-tolerant large-scale multi-DR quantum computer.

Superconductor single-flux-quantum (SFQ) logic family has been recognized as a promising technology for cryogenic applications (e.g., quantum computing, astronomy, metrology) thanks to its ultra-fast and low-energy characteristics. Therefore, recent efforts in SFQ-based computing have focused on developing fast and low-power SFQ processors for cryogenic applications. However, there still has been little progress toward a convincing SFQ processor design due to the critical performance challenges originating from its extremely deep pipeline. In this paper, we propose a super-fast and low-power in-order SFQ processor by tackling the challenges from the deep pipeline. First, we develop a minimal-depth SFQ processor pipeline with novel architecture-level ideas. Next, we conduct in-depth performance analyses and identify three real performance bottlenecks in the deeply pipelined SFQ processors (i.e., stall/flush logic, RAW stall, fetch unit). Finally, we propose SuperCore, our super-fast SFQ-based processor architecture, with three SFQ-friendly solutions that effectively resolve the identified bottlenecks. With our solutions applied, SuperCore achieves 11 times speed-up over the SFQ processor baseline. In addition, SuperCore achieves six times speed-up and consumes up to 193 times less power compared to in-order CMOS processors running at 4K.

A 10+K qubit Quantum-Classical Interface (QCI) is essential to realize the quantum supremacy. However, it is extremely challenging to architect scalable QCIs due to the complex scalability trade-offs regarding operating temperatures, device and wire technologies, and microarchitecture designs. Therefore, architects need a modeling tool to evaluate various QCI design choices and lead to an optimal scalable QCI architecture.