Demo Data from EDBT 2026 / reviewers in the wild / expert
Ying Zhang 0032
dblp:13/6769-32
· DBLP profile ↗
16ranked-venue papers
4as first author
0since 2021 · last 2014
—ORCID · conflict
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 10 · 2 first-authorSecurity and privacy · 2Software engineering, systems software and programming languages · 2 · 1 first-authorApplied, interdisciplinary, general and emerging computing · 2 · 1 first-authorArtificial intelligence and machine learning · 1Graphics, computer vision, multimedia, augmented reality and games · 1
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
4 papers |
Processor architecture and microarchitecture · 73% High-performance computing · 27% | |
| Software engineering, system software, and programming languages
4 papers |
Compilers and program optimization · 100% |
Topics — the 10 heaviest of 11, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Processor architecture and microarchitecture › data-parallel architecture
stream processor |
0.4 | 4 | 2010 | Exploiting the reuse supplied by loop-dependent stream references for stream processors · ACM Trans. Archit. Code Optim. 2010 Fei Teng 64 Stream Processing System: Architecture, Compiler, and Programming · IEEE Trans. Parallel Distributed Syst. 2009 Comparability graph coloring for optimizing utilization of stream register files in stream processors · PPoPP 2009 |
Processor architecture and microarchitecture › dataflow architecture
stream architecture |
0.2 | 2 | 2009 | Fei Teng 64 Stream Processing System: Architecture, Compiler, and Programming · IEEE Trans. Parallel Distributed Syst. 2009 A 64-bit stream processor architecture for scientific applications · ISCA 2007 |
Compilers and program optimization
stream programming |
0.1 | 1 | 2010 | Exploiting the reuse supplied by loop-dependent stream references for stream processors · ACM Trans. Archit. Code Optim. 2010 |
High-performance computing
scientific computing |
0.1 | 2 | 2009 | A 64-bit stream processor architecture for scientific applications · ISCA 2007 Fei Teng 64 Stream Processing System: Architecture, Compiler, and Programming · IEEE Trans. Parallel Distributed Syst. 2009 |
Compilers and program optimization › register allocation
graph coloring register allocation |
0.1 | 1 | 2009 | Comparability graph coloring for optimizing utilization of stream register files in stream processors · PPoPP 2009 |
Compilers and program optimization
register allocation |
0.1 | 1 | 2009 | Comparability graph coloring for optimizing utilization of stream register files in stream processors · PPoPP 2009 |
Compilers and program optimization › domain-specific compilation
stream compiler |
0.1 | 1 | 2009 | Fei Teng 64 Stream Processing System: Architecture, Compiler, and Programming · IEEE Trans. Parallel Distributed Syst. 2009 |
High-performance computing
scientific computing systems |
0.1 | 1 | 2007 | A 64-bit stream processor architecture for scientific applications · ISCA 2007 |
High-performance computing › performance optimization
scientific application acceleration |
0.0 | 1 | 2009 | Fei Teng 64 Stream Processing System: Architecture, Compiler, and Programming · IEEE Trans. Parallel Distributed Syst. 2009 |
Graph algorithms and graph theory › graph classes › perfect graph
comparability graphs |
0.0 | 1 | 2009 | Comparability graph coloring for optimizing utilization of stream register files in stream processors · PPoPP 2009 |
Methods — techniques the papers use, named apart from their topics
comparability graph coloring · 0.3stream reuse graph · 0.2loop-dependent reference analysis · 0.2stream programming · 0.2compiler design · 0.2
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2014 | Hunter: Online Accurate Taint Propagation Analysis Based System for Detecting Bugs in BinariesabstractDynamic test generation approach is becoming increasingly popular to find security vulnerabilities in software, and is applied to detect bugs in binaries. However, the existing such systems adopt offline symbolic analysis and execution, based on program execution trace which includes the flow of execution instructions and the operand values, with all input-related memory access replaced by their execution values. And this brings two fatal problems: first, all symbolic information of input-related memory access is missing, second, the symbolic information of other variables is not accurate, especially for variables operated with input-related memory accesses. This paper presents an online taint analysis based automatic dynamic test generation system, Hunter, which can online find unknown high-priority fatal bugs that must be fixed immediately at a pre-release stage in binaries. To yield this goal, we present a new abstract representation called Taint Single Assignment DAG (TSADAG) to depict the taint propagation information, and we present the algorithm to build TSADAG during online execution, and we build the Hunter system finally. Experimental results show that Hunter has a very low divergence rate of less than 5.4% thanks to the online accurate taint propagation Analysis, and can find pointer-related or indirect memory access-related bugs. Gen Li 0002, Shuangxi Wang, Ying Zhang 0032, Xiaohui Peng 0004 |
DASC | 3 |
| 2010 | An affine invariant interest point and region detector based on Gabor filtersabstractThis paper presents a novel approach for interest point and region detection which is invariant to affine transformations. Such transformations introduce significant changes in the point location as well as in the scale and the shape of the neighborhood of an interest point. Our approach allows to solve for these problems simultaneously. The approach is based on three key ideas: 1) Interest points can be extracted based on local maxima of the normalized local energy maps. 2) Local extrema over scale of the normalized energy function indicate the presence of characteristic local structures. 3) The maximum response along all the orientations indicates the principle orientation of the local structure. We first extract interest points at multi-scales from the local energy map constructed by Gabor filter responses, and then select points at which a local measure is maximal over scales. This allows a selection of distinctive points for which the characteristic scale is known. We then estimate the principle orientation through the orientational responses of Gabor filters and extend the detector to affine invariance by estimating the affine shape of a point neighborhood. The characteristic scale and the affine shape of neighborhood determine an affine invariant region for each point. Experimental results with synthetic images and natural images show the affine invariance performance of our approach. Comparative evaluation using the repeatability criteria demonstrates the comparable performance in the presence of large viewpoint changes. Wanying Xu, Xinsheng Huang, Xingwei Li, Ying Zhang 0032, Wei Zhang 0027 |
ICARCV | 4 |
| 2010 | Exploiting the reuse supplied by loop-dependent stream references for stream processorsabstractMemory accesses limit the performance of stream processors. By exploiting the reuse of data held in the Stream Register File (SRF), an on-chip, software controlled storage, the number of memory accesses can be reduced. In current stream compilers, reuse exploitation is only attempted for simple stream references, those whose start and end are known. Compiler analysis, from outside of stream processors, does not directly enable the consideration of other more complex stream references. In this article, we propose a transformation to automatically optimize stream programs to exploit the reuse supplied by loop-dependent stream references. The transformation is based on three results: lemmas identifying the reuse supplied by stream references, a new abstract representation called the Stream Reuse Graph (SRG) depicting the identified reuse, and the optimization of the SRG for our transformation. Both the reuse between the whole sequences accessed by stream references and between partial sequences is exploited in the article. In particular, partial reuse and its treatment are quite new and have never, to the best of our knowledge, appeared in scalar and vector processing. At the same time, reusing streams increases the pressure on the SRF, and this presents a problem of which reuse should be exploited within limited SRF capacity. We extend our analysis to achieve this objective. Finally, we implement our techniques based on the StreamC/KernelC compiler that has been optimized with the best existing compilation techniques for stream processors. Experimental results show a resultant speed-up of 1.14 to 2.54 times using a range of benchmarks. Xuejun Yang, Ying Zhang 0032, Xicheng Lu, Jingling Xue, Ian Rogers, Gen Li 0002, Guibin Wang, Xudong Fang |
ACM Trans. Archit. Code Optim. | 2 |
| 2009 | Architecture- and OS-Independent Binary-Level Dynamic Test Generation
Gen Li 0002, Kai Lu 0001, Ying Zhang 0032, Xicheng Lu, Wei Zhang 0027 |
ICICS | 3 |
| 2009 | Program Optimization of Stencil Based Application on the GPU-Accelerated SystemabstractGraphic Processing Unit (GPU), with many light-weight data-parallel cores, can provide substantial parallel computational power to accelerate general purpose applications. But the powerful computing capacity could not be fully utilized for memory-intensive applications, which are limited by off-chip memory bandwidth and latency. Stencil computation has abundant parallelism and low computational intensity which make it a useful architectural evaluation benchmark. In this paper, we propose some memory optimizations for a stencil based application mgrid from SPEC 2K benchmarks. Through exploiting data locality in 3-level memory hierarchies and tuning the thread granularity, we reduce the pressure on the off-chip memory bandwidth. To hide the long off-chip memory access latency, we further prefetch data during computation through double-buffer. In order to fully exploit the CPU-GPU heterogeneous system, we redistribute the computation between these two computing resource. Through all these optimizations, we gain 24.2x speedup compared to the simple mapping version, and get as high as 34.3x speedup when compared with a CPU implementation. Guibin Wang, Xuejun Yang, Ying Zhang 0032, Tao Tang 0001, Xudong Fang |
ISPA | 3 |
| 2009 | Comparability graph coloring for optimizing utilization of stream register files in stream processorsabstractA stream processor executes an application that has been decomposed into a sequence of kernels that operate on streams of data elements. During the execution of a kernel, all streams accessed must be communicated through the SRF (Stream Register File), a non-bypassing software-managed on-chip memory. Therefore, optimizing utilization of the SRF is crucial for good performance. The key insight is that the interference graphs formed by the streams in stream applications tend to be comparability graphs or decomposable into a set of multiple comparability graphs. We present a compiler algorithm that can find optimal or near-optimal colorings in stream IGs, thereby improving SRF utilization than the First-Fit Xuejun Yang, Li Wang 0027, Jingling Xue, Yu Deng 0001, Ying Zhang 0032 |
PPoPP | 5 |
| 2009 | SRF Coloring: Stream Register File Allocation via Graph Coloring
Xuejun Yang, Yu Deng 0001, Li Wang 0027, Xiaobo Yan, Jing Du 0002, Ying Zhang 0032, Guibin Wang, Tao Tang 0001 |
J. Comput. Sci. Technol. | 6 |
| 2009 | Fei Teng 64 Stream Processing System: Architecture, Compiler, and ProgrammingabstractThe stream architecture is a novel microprocessor architecture with wide application potential. It is critical to study how to use the stream architecture to accelerate scientific computing programs. However, existing stream processors and stream programming languages are not designed for scientific computing. To address this issue, we design and implement a 64-bit stream processor, Fei Teng 64 (FT64), which has a peak performance of 16 Gflops. FT64 supports two kinds of communications, message passing and stream communications, based on which, an interconnection architecture is designed for a FT64-based high-performance computer. This high-performance computer contains multiple modules, with each module containing eight FT64s. We also design a novel stream programming language, stream Fortran 95 (SF95), together with the compiler SF95 compiler, so as to facilitate the development of scientific applications. We test nine typical scientific application kernels on our FT64 platform to evaluate this design. The results demonstrate the effectiveness and efficiency of FT64 and its compiler for scientific computing. Xuejun Yang, Xiaobo Yan, Zuocheng Xing, Yu Deng 0001, Jing Du 0002, Ying Zhang 0032 |
IEEE Trans. Parallel Distributed Syst. | 7 |
| 2008 | Exploiting loop-dependent stream reuse for stream processorsabstractThe memory access limits the performance of stream processors. By exploiting the reuse of data held in the Stream Register File (SRF), an on-chip storage, the number of memory accesses can be reduced. In current stream compilers reuse is only attempted for simple stream references, those whose start and end are known. Compiler analysis from outside of stream processors does not directly enable the consideration of other complex stream references. In this paper we propose a transformation to automatically optimize stream programs to exploit the reuse supplied by loop-dependent stream references. The transformation is based on three results: algorithms to recognize the reuse supplied by stream references, a new abstract expression called the Stream Reuse Graph (SRG) to depict the reuse and the optimization of the SRG for the transformation. Both the reuse between whole sequences accessed by stream references and that between partial sequences are exploited in the paper. In particular, the problem of exploiting partial stream reuse does not have its parallel in the traditional data reuse exploitation setting (for scalars and arrays). Finally, we have implemented our techniques using the StreamC/KernelC compiler for Imagine. Experimental results show a resultant speedup of 1.14 to 2.54 times using a range of typical stream processing application kernels. Xuejun Yang, Ying Zhang 0032, Jingling Xue, Ian Rogers, Gen Li 0002, Guibin Wang |
PACT | 2 |
| 2008 | Mapping and Optimizing 2-D Jacobi Iteration on a Stream ProcessorabstractStream processors, with the stream programming model, have demonstrated significant performance advantages in the domains signal processing, multimedia and graphics applications. In this paper we examine the applicability of a stream processor to 2-D Jacobi iteration which is widely used to solve partial differential equations, an important class of scientific programs. We first map 2-D Jacobi iteration in FORTRAN version to the stream processor in a straightforward way. In a stream processor system, the management of system resources is the programmers' responsibility. We then present several optimizations, which avail the stream program for 2-D Jacobi iteration, called StreamJacobi, of various aspects of the stream processor architecture. Finally, we analyze the performance of StreamJacobi, with different scales, and the presented optimizations. The final stream program StreamJacobi is from 2.31 to 6.42 times faster than the corresponding FORTRAN programs on a Xeon 5100 processor, with the optimizations playing an important role in realizing the performance improvement. Ying Zhang 0032, Qiang Dou, Gen Li 0002, Xuejun Yang, Yongjin Li, Caixia Huang |
HPCC | 1 |
| 2008 | Scientific Computing Applications on a Stream ProcessorabstractStream processors, developed for the stream programming model, perform well on media applications. In this paper we examine the applicability of a stream processor to scientific computing applications. Eight scientific applications, each having different performance characteristics, are mapped to a stream processor. Due to the novelty of the stream programming model, we show how to map programs in a traditional language, such as FORTRAN. In a stream processor system, the management of system resources is the programmers' responsibility. We present several optimizations, which enable mapped programs to exploit various aspects of the stream processor architecture. Finally, we analyze the performance of the stream processor and the presented optimizations on a set of scientific computing applications. The stream programs are from 1.67 to 32.5 times faster than the corresponding FORTRAN programs on an Itanium 2 processor, with the optimizations playing an important role in realizing the performance improvement. Ying Zhang 0032, Xuejun Yang, Guibin Wang, Ian Rogers, Gen Li 0002, Yu Deng 0001, Xiaobo Yan |
ISPASS | 1 |
| 2007 | Optimizing Stream Organization to Improve the Performance of Scientific Computing Applications on the Stream Processor
Ying Zhang 0032, Gen Li 0002, Xuejun Yang |
ICA3PP | 1 |
| 2007 | Implementing and Optimizing a Data-Intensive Hydrodynamics Application on the Stream Processor
Ying Zhang 0032, Gen Li 0002, Xuejun Yang |
ICCSA (3) | 1 |
| 2007 | Efficient generation of stream programs from loopsabstractThe efficiency of scientific applications on the Imagine stream processor is increasingly concerned by researchers. One of the obstacles is that the programming language of Imagine does not target the scientific computing. This paper introduces a program transformation algorithm to automatically transform loops to the stream programs executed on Imagine. The optimization for memory accessing is also considered during the transformation. We have implemented the transformation and optimization algorithm with the GFORTRAN frontend. Preliminary results over benchmark kernels show that our approach is a convenient and efficient solution to develop scientific applications on the Imagine stream processor. Xuejun Yang, Yu Deng 0001, Xiaobo Yan, Li Wang 0027, Jing Du 0002, Ying Zhang 0032 |
ICPADS | 6 |
| 2007 | A 64-bit stream processor architecture for scientific applicationsabstractStream architecture is a novel microprocessor architecture with wide application potential. But as for whether it can be used efficiently in scientific computing, many issues await further study. This paper first gives the design and implementation of a 64-bit stream processor, FT64 (Fei Teng 64), for scientific computing. The carrying out of 64-bit extension design and scientific computing oriented optimization are described in such aspects as instruction set architecture, stream controller, micro controller, ALU cluster, memory hierarchy and interconnection interface here. Second, two kinds of communications as message passing and stream communications are put forward. An interconnection based on the communications is designed for FT64-based high performance computers. Third, a novel stream programming language, SF95 (Stream FORTRAN95), and its compiler, SF95Compiler (Stream FORTRAN95 Compiler), are developed to facilitate the development of scientific applications. Finally, nine typical scientific application kernels are tested and the results show the efficiency of stream architecture for scientific computing. Xuejun Yang, Xiaobo Yan, Zuocheng Xing, Yu Deng 0001, Ying Zhang 0032 |
ISCA | 6 |
| 2007 | Implementation and Optimization of Sparse Matrix-Vector Multiplication on Imagine Stream Processor
Li Wang 0027, Xuejun Yang, Guibin Wang, Xiaobo Yan, Yu Deng 0001, Jing Du 0002, Ying Zhang 0032, Tao Tang 0001 |
ISPA | 7 |