Ensuring electromagnetic compatibility in electric vehicles is crucial, along with minimizing DC bus voltage ripple caused by inverter switching to maintain system stability and performance. The circuit consisting of the electromagnetic interference filter and the DC-link capacitor is a passive network that represents one of the most critical systems of the inverter in terms of reliability. This paper presents a novel method for the characterization of DC-link capacitor aging and detection of electromagnetic interference filter degradation using impedance response analysis. This method enables distinguishing between the aging of the electromagnetic interference filter and the DC-link capacitor through a single measurement, without the need to open the inverter, requiring access only to the high-voltage DC terminals.

Ensuring electromagnetic compatibility in electric vehicles is crucial to maintain system stability and performance. The inverter is the most significant source of electromagnetic interference (EMI) in the vehicle because switching the transistors within the frequency module generates noise that propagates through the high-voltage conductors. The DC side passive network circuit, which consists of the EMI filter and the DC-link capacitor, represents one of the most critical systems of the inverter regarding EMI reduction and reliability. The degradation of passive components, such as the capacitors that form the EMI filters, over the vehicle's lifetime directly impacts compliance with these requirements and may lead to malfunctions in the vehicle's operation. This paper investigates the impact of aging on the components of the passive network, evaluating the resulting changes in the performance and efficiency of the overall passive network system.

This paper presents a gate-driving strategy to address high-speed switching problems in Gallium Nitride (GaN) transistors. The strategy consists of emulating a multi-stage gate-voltage (VG) profile by applying ultra-fast pulse sequences (UFPS) embedded within a conventional PWM signal and applied to GaN transistors. The implementation is achieved using a field-programmable gate array (FPGA) and validated on a GaN device under test (DUT) through experimental testing. The results confirm the feasibility of the approach and its effectiveness in mitigating high-speed switching issues associated with GaN transistors.

A novel active gate driver (AGD) for silicon carbide (SiC) MOSFET is studied in this paper. The gate driver (GD) increases the gate resistance value during the voltage plateau area of the gate-source voltage, in both turn-on and turn-off transitions. The proposed AGD is validated in both simulation and experimental environments and in hard-switching conditions. The simulation is evaluated in MATLAB/Simulink with 100 kHz of switching frequency and 600 V of dc-bus, whereas, the experimental part was realised at 100 kHz and 100 V of dc-bus. The results show that the gate driver can reduce the over-voltage and ringing, with low switching losses.

This paper presents a new active gate control (AGC) approach for improving the switching behavior of insulated gate bipolar transistors (IGBTs). The proposed controller is applied on the gate driver (GD) of IGBT, which is based on Posicast control method. The reduction of stress in transient conditions without harmful effect on the efficiency is the main objective of this research that is accomplished by a simple feed-forward controller. The effectiveness of the proposed gate drive controller is verified by both MATLAB/Simulink and PSIM softwares. Moreover, the new GD is implemented in the experimental setup, and the results are reflected in this paper.