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Hidetoshi Miyashita

dblp:131/1927 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2013
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Applied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 100%

Topics — the 4 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design › semiconductor device fabrication
epitaxy		 0.212013
Site-Selective Epitaxy of Graphene on Si Wafers · Proc. IEEE 2013
Integrated circuit design
semiconductor device fabrication		 0.212013
Site-Selective Epitaxy of Graphene on Si Wafers · Proc. IEEE 2013
Integrated circuit design
digital circuit design		 0.012013
Site-Selective Epitaxy of Graphene on Si Wafers · Proc. IEEE 2013
Integrated circuit design › semiconductor technology › semiconductor process technology
silicon technology		 0.012013
Site-Selective Epitaxy of Graphene on Si Wafers · Proc. IEEE 2013

Methods — techniques the papers use, named apart from their topics

substrate orientation control · 0.2site-selective epitaxy · 0.2
YearPublicationVenuePosition
2013 Site-Selective Epitaxy of Graphene on Si Wafers
abstract
The fusion of graphene with silicon may provide an effective solution to the problem of scale in electronic devices. This approach will allow the excellent electronic properties of graphene to be combined with known Si device technologies. We review the epitaxial growth of graphene on Si substrates (GOS) for fabricating transistors. GOS has been multifunctionalized by controlling the orientation of the Si substrate. The site-selective epitaxy of GOS has also been developed by controlling the base SiC thin films. These results demonstrate that GOS is suitable for integrated devices.
Hirokazu Fukidome, Yusuke Kawai, Hiroyuki Handa, Hiroki Hibino, Hidetoshi Miyashita, Masato Kotsugi, Takuo Ohkochi, Myung-Ho Jung, Tetsuya Suemitsu, Toyohiko Kinoshita, Taiichi Otsuji, Maki Suemitsu
 Proc. IEEE5