Demo Data from EDBT 2026 / reviewers in the wild / expert
Myung-Ho Jung
dblp:131/2138
· DBLP profile ↗
2ranked-venue papers
1as first author
0since 2021 · last 2013
0000-0003-3602-9879ORCID · corroborated
Domains — the database's venue-derived domains; a paper can count in several
Applied, interdisciplinary, general and emerging computing · 2 · 1 first-author
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
2 papers |
Integrated circuit design · 100% |
Topics — the 6 heaviest of 7, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Integrated circuit design › semiconductor device fabrication
epitaxy |
0.2 | 1 | 2013 | Site-Selective Epitaxy of Graphene on Si Wafers · Proc. IEEE 2013 |
Integrated circuit design › semiconductor devices › field-effect transistor
graphene field-effect transistors |
0.2 | 1 | 2013 | High-Performance Graphene Field-Effect Transistors With Extremely Small Access Length Using Self-Aligned Source and Drain Technique · Proc. IEEE 2013 |
Integrated circuit design
semiconductor device fabrication |
0.2 | 1 | 2013 | Site-Selective Epitaxy of Graphene on Si Wafers · Proc. IEEE 2013 |
Integrated circuit design › semiconductor devices › semiconductor device design
transistor design |
0.2 | 1 | 2013 | High-Performance Graphene Field-Effect Transistors With Extremely Small Access Length Using Self-Aligned Source and Drain Technique · Proc. IEEE 2013 |
Integrated circuit design
digital circuit design |
0.0 | 1 | 2013 | Site-Selective Epitaxy of Graphene on Si Wafers · Proc. IEEE 2013 |
Integrated circuit design › semiconductor technology › semiconductor process technology
silicon technology |
0.0 | 1 | 2013 | Site-Selective Epitaxy of Graphene on Si Wafers · Proc. IEEE 2013 |
Methods — techniques the papers use, named apart from their topics
substrate orientation control · 0.2site-selective epitaxy · 0.2self-aligned processes · 0.2
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2013 | Site-Selective Epitaxy of Graphene on Si WafersabstractThe fusion of graphene with silicon may provide an effective solution to the problem of scale in electronic devices. This approach will allow the excellent electronic properties of graphene to be combined with known Si device technologies. We review the epitaxial growth of graphene on Si substrates (GOS) for fabricating transistors. GOS has been multifunctionalized by controlling the orientation of the Si substrate. The site-selective epitaxy of GOS has also been developed by controlling the base SiC thin films. These results demonstrate that GOS is suitable for integrated devices. Hirokazu Fukidome, Yusuke Kawai, Hiroyuki Handa, Hiroki Hibino, Hidetoshi Miyashita, Masato Kotsugi, Takuo Ohkochi, Myung-Ho Jung, Tetsuya Suemitsu, Toyohiko Kinoshita, Taiichi Otsuji, Maki Suemitsu |
Proc. IEEE | 8 |
| 2013 | High-Performance Graphene Field-Effect Transistors With Extremely Small Access Length Using Self-Aligned Source and Drain TechniqueabstractSelf-aligned source/drain (S/D) graphene field-effect transistors (GFETs) with extremely small access lengths were successfully fabricated using a simple device fabrication process without sidewall spacer formation. The self-aligned S/D GFET exhibits superior electrical characteristics, such as the intrinsic carrier mobility of 6100 cm2/Vs, the gate leakage current of 10-10-10-9A and the contact resistance of 412 Ωμm. In particular, a cutoff frequency of 13 GHz was achieved with a rather large gate length (LG= 3 μm), which demonstrates the promising future of this self-aligned GFET. Myung-Ho Jung, Goon-Ho Park, Tomohiro Yoshida, Hirokazu Fukidome, Tetsuya Suemitsu, Taiichi Otsuji, Maki Suemitsu |
Proc. IEEE | 1 |