This paper presents an analysis and design of a duty-cycled ambient RF energy harvester (RFEH) IC effectively harvesting a relatively large amount of energy from a small input RF power. We have newly developed the system model of the duty-cycled ambient RFEH by considering the rectifier current, the power management unit (PMU) current, the capacitor current and the load current. Based on this system model, we have defined the capacitor charging power and analyzed the power conversion efficiency (PCE). From the analysis results, we could find the optimum input RF power maximizing the PCE at a given output DC voltage. By considering this optimum input RF power as well as the PCE, the passive amplification gain and the charging time simultaneously, we have optimized the design parameters of the RF-DC rectifier. For circuit implementation, we have placed the input coupling metal-oxide-metal (MOM) capacitors of the RF-DC rectifier above the P-diffusion area with relatively low parasitic resistance, minimized the power consumption of the PMU and considered the capacitor leakage current to enhance the PCE. The duty-cycled ambient RFEH IC has been implemented in a 28nm 1P11M CMOS process and the active die area is 0.047mm2. It has demonstrated the ability to harvest$8.7{\mu }$J at$100{\mu }$F per 1.6 hours from –35.2dBm input RF power at 884MHz. The measured input power sensitivity is –40.8dBm for the output DC voltage of 0.87V when the storage capacitance is$0.47{\mu }$F and the PMU is operating.

In this brief, we discuss the merits of using nMOS-pMOS (NP)-type cells instead of nMOS-nMOS (NN)- or pMOS-pMOS (PP)-type cells in a single-ended, threshold-voltage compensated CMOS RF-dc rectifier. By adopting the NP-type cells, we can avoid the degradation of the generated output dc voltage due to parasitic long interconnection wire capacitance, deep N-well to P-substrate junction capacitance, and additional body effect. For comparison, we have implemented two RF-dc rectifiers in a 28-nm 1P11M CMOS process. The measured results show that the implemented RF-dc rectifier with the NP-type cells achieves 0.7-dB higher input power sensitivity and$3\times $faster recharging time than the other rectifier with the NN-type cells.

This paper presents an 884MHz CMOS RF-DC rectifier for ambient RF energy harvesting. Generally, the input power sensitivity increases as the RF-DC rectifier contains more number of rectifier cells. However, integrating a large number of rectifier cells normally reduces the passive amplification gain of the matching network and thus may not bring the desired results. In this paper, the proposed RF-DC rectifier adopts metal ground shield plane beneath the input coupling capacitors thereby incorporating as many as 570 rectifier cells without lowering the passive amplification gain. By doing so, the 884MHz, 570-stage RF-DC rectifier implemented in a 28nm 1P11M CMOS process achieves the measured input power sensitivity of −41.8dBm at 1V output DC voltage. The measured recharging time from 0.88V to 1.0V is 11.1 seconds when the storage capacitor is 1nF. Also, the over-the-air functionality with ambient LTE downlink signals has been demonstrated in a real environment.

This paper presents an analysis and design of an 884-MHz, −41.8-dBm input power sensitivity, 570-stage CMOS RF-DC rectifier with ground shielded input coupling capacitors. First, we have presented the input impedance model of an N-stage CMOS RF-DC rectifier by applying$\Delta $-Y transform to the input coupling capacitors and including a nonlinear input resistance of the MOS transistors. Based on the developed model, we have carried out the steady-state and transient analyses of the N-stage RF-DC rectifier. According to the analysis results, the input power sensitivity increases as the RF-DC rectifier contains more rectifier cells. However, integrating a large number of rectifier cells normally reduces the passive amplification gain of the matching network and thus may not bring the desired results. In this paper, we propose the RF-DC rectifier adopting a metal ground shield plane beneath the input coupling capacitors thereby incorporating as many as 570 rectifier cells without lowering the passive amplification gain. By doing so, the 884-MHz, 570-stage RF-DC rectifier implemented in a 28nm CMOS process achieves the measured input power sensitivity of −41.8dBm at 1V output DC voltage. The measured recharging time from 0.88V to 1.0V is 11.1 seconds when the storage capacitor is 1nF.

This paper presents 16-bit DSP processor and system for baseband and voiceband processing of IS-136 digital cellular telephony that is North America TDMA standard. The DSP, named MIGHTI, that is designed for mobile communication applications, has some special instructions that allow instruction pipelining for the compound operations. MIGHTI includes a low-power 16 K-word flexible port fullcustom memory. With MIGHTI, IS-136 baseband and voiceband processing that normally requires 45 MIPS in a conventional DSP, is performed in just 36 MIPS. The system developed for baseband and voiceband processing does meet the requirements of the IS-136 standard.