Junyuan Huang

dblp:132/4187 · DBLP profile ↗
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5ranked-venue papers
1as first author
5since 2021 · last 2026
0009-0009-9377-4219ORCID · corroborated

Domains — the database's venue-derived domains; a paper can count in several

Artificial intelligence and machine learning · 2 · 2 since 2021Systems, architecture and hardware · 2 · 1 first-author · 2 since 2021Databases, data management, data science and information retrieval · 1 · 1 since 2021Applied, interdisciplinary, general and emerging computing · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Memory systems · 56% Storage systems · 36% Distributed systems · 8%

Topics — the 5 heaviest of 5, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Storage systems
crash consistency
0.912025
CodePM: Parity-Based Crash Consistency for Log-Free Persistent Transactional Memory · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025
Memory systems › non-volatile memory
persistent memory
0.912025
CodePM: Parity-Based Crash Consistency for Log-Free Persistent Transactional Memory · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025
Memory systems › non-volatile memory › persistent memory
persistent transactional memory
0.912025
CodePM: Parity-Based Crash Consistency for Log-Free Persistent Transactional Memory · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025
Distributed systems
fault tolerance
0.312025
CodePM: Parity-Based Crash Consistency for Log-Free Persistent Transactional Memory · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025
Storage systems › erasure-coded storage
parity-based recovery
0.312025
CodePM: Parity-Based Crash Consistency for Log-Free Persistent Transactional Memory · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2025

Methods — techniques the papers use, named apart from their topics

speculative scanning recovery · 0.9parity-based crash consistency · 0.9fine-grained memory fences · 0.9
YearPublicationVenuePosition
2026 Wave-DETR: Real-Time UAV Small Object Detection with Wavelet Feature Fusion and Progressive Query Pruning
Mengxiao Yin, Jiachao Li, Junyuan Huang
ICIC (20)4
2026 A dual-branch multi-scale encoding and fusion model for multivariate time series forecasting
Jiachao Li, Mengxiao Yin, Junyuan Huang
Eng. Appl. Artif. Intell.3
2025 GroupRS: Node-Grouping-Based Data Placement Strategy in Erasure-Coded Data Center Storage for High Data Reliability
abstract
Data center storage systems commonly use erasure codes instead of replication to ensure data reliability at a lower cost, striping data into blocks and placing them randomly across nodes. Studies on replication have shown that random block placement can lead to data loss during multi-node failures, and grouping nodes and placing replicas within these groups is used to enhance data reliability. However, random grouping block placement in erasure-coded storage systems often falls short of the required repair parallelism across nodes. Additionally, creating a globally optimal grouping scheme that meets the requirements incurs prohibitively high time complexity. In this paper, we analyze the data reliability of erasure-coded storage systems using node-grouping-based data placement, revealing a trade-off between fault tolerance and repair parallelism. Based on the above analysis, we propose GroupRS, a node-grouping-based data placement strategy that utilizes a greedy heuristic to group nodes for greater node repair parallelism while maintaining the fault tolerance, thereby enhancing the reliability of the data. In addition, for rack failures, we propose GroupRSR atop GroupRS, a simulated annealing-based optimization strategy to reduce the probability of data loss caused by rack failures. Simulation results show that GroupRS improves system reliability by 18% over Copyset with the same fault tolerance, and by 1 × with the same repair parallelism. Cloud tests reveal that GroupRS reduces the average repair time by 47% with the same fault tolerance and increases MTTDL by 2.5 times. In racklevel fault scenarios, GroupRS-R further reduces the repair time by 10%.
Junyuan Huang, Yuchong Hu, Guanglei Xu
ICPADS1
2025 CodePM: Parity-Based Crash Consistency for Log-Free Persistent Transactional Memory
abstract
Emerging persistent memory (PM) can provide large persistent capacity with performance comparable to DRAM in modern memory systems. Persistent transactional memory (PTM) needs to ensure data consistency after unexpected power loss or crashes. Therefore, crash consistency strategies, such as persistent logging, are still required. However, the additional overhead introduced by these strategies, such as significant extra writes on PM, can lead to system performance degradation. In this article, we propose CodePM, a fault-tolerant PM transactional library that utilizes parity-based crash consistency to remove logging overhead while guaranteeing the correct state of data. CodePM reuses the decoding capability of parity to detect and recover inconsistent objects. To ensure consistency without logs when updating, CodePM employs fine-grained memory fences to carefully align potential inconsistency with the repairability of parity. To detect inconsistency without logs when recovering, CodePM utilizes optimistic speculative scanning recovery by reusing checksum and parity, which supports instant recovery with transient degraded reliability. Moreover, we study the memory fence blocking effects and further augment CodePM with pipelined encoding and persistent writing to hide update latency. We implemented CodePM on Pangolin, the state-of-the-art parity-based PTM for fault-tolerance. Evaluation results with real-world workloads on Intel Optane DCPMM show that CodePM can achieve up to$3.4\times $higher throughput than Pangolin.
Guanglei Xu, Yuchong Hu, Dan Feng 0001, Wenpeng He, Junyuan Huang
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.5
2023 Hierarchical Meta-Learning with Hyper-Tasks for Few-Shot Learning
abstract
Meta-learning excels in few-shot learning by extracting shared knowledge from the observed tasks. However, it needs the tasks to adhere to the i.i.d. constraint, which is challenging to achieve due to complex task relationships between data content. Current methods that create tasks in a one-dimensional structure and use meta-learning to learn all tasks flatly struggle with extracting shared knowledge from tasks with overlapping concepts. To address this issue, we propose further constructing tasks from the same environment into hyper-tasks. Since the distributions of hyper-tasks and tasks in a hyper-task can both be approximated as i.i.d. due to further summarization, the meta-learning algorithm can capture shared knowledge more efficiently. Based on the hyper-task, we propose a hierarchical meta-learning paradigm to meta-learn the meta-learning algorithm. The paradigm builds a customized meta-learner for each hyper-task, which makes meta-learners more flexible and expressive. We apply the paradigm to three classic meta-learning algorithms and conduct extensive experiments on public datasets, which confirm the superiority of hierarchical meta-learning in the few-shot learning setting. The code is released at https://github.com/tuantuange/H-meta-learning.
Yunchuan Guan, Yu Liu 0040, Ke Zhou 0001, Junyuan Huang
CIKM4