The double-error-correcting capabilities of the Iwadare and of the Berlekamp--Preparata-Massey burst-correcting codes are analyzed.

A class of high-speed decodable burst-correcting codes is presented. This class of codes is obtained by modifying burst-correcting convolutional codes into block codes and does not require any cyclic shifts in the decoding process. With the appropriate choices of parameters, the codes can approximate minimum-redundancy codes. The high-speed decodability is expected to make these codes suitable for application to computer systems.

Two new classes of type-B1 burst-error-correcting convolutional codes are introduced. One of them requires a shorter length of guard space and a smaller number of shift register stages than optimum type-B2 codes used for type-B1 burst correction. Another class of codes improves the required number of shift register stages considerably when the correctable burst length is very large. In addition, these codes require a very short length of additional guard space to restore the decoder to correct operation after a decoding failure. Both classes of codes are derived in a straightforward manner and their implementations are also very simple. Thus, we can avoid type-B2 code procedures to correct type-B1 bursts. The codes derived here result in the more efficient and simply implemented type-B1 burst-correcting convolutional codes.