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Zakaria Najm

dblp:134/7426 · DBLP profile ↗
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10ranked-venue papers
0as first author
1since 2021 · last 2021
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Security and privacy · 6 · 1 since 2021Systems, architecture and hardware · 4Software engineering, systems software and programming languages · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Network and information security
5 papers
Hardware security and side channels · 82% Cryptographic primitives and cryptanalysis · 18%
Computer architecture, parallel and distributed computing, and storage systems
1 paper
Electronic design automation · 62% Integrated circuit design · 38%

Topics — the 13 heaviest of 13, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Hardware security and side channels
side-channel attack
1.142018
Multivariate High-Order Attacks of Shuffled Tables Recomputation · J. Cryptol. 2018
Cryptographically Secure Shield for Security IPs Protection · IEEE Trans. Computers 2017
Correlated Extra-Reductions Defeat Blinded Regular Exponentiation · CHES 2016
Hardware security and side channels › side-channel attack
higher-order side-channel attack
0.312018
Multivariate High-Order Attacks of Shuffled Tables Recomputation · J. Cryptol. 2018
Hardware security and side channels › physical attacks
probing attack
0.312017
Cryptographically Secure Shield for Security IPs Protection · IEEE Trans. Computers 2017
Hardware security and side channels
fault attack countermeasure
0.212016
PLL to the rescue: a novel EM fault countermeasure · DAC 2016
Electronic design automation
design flow
0.212016
PLL to the rescue: a novel EM fault countermeasure · DAC 2016
Cryptographic primitives and cryptanalysis › differential cryptanalysis
higher-order differential attacks
0.212015
Multi-variate High-Order Attacks of Shuffled Tables Recomputation · CHES 2015
Cryptographic primitives and cryptanalysis
block cipher
0.222017
Cryptographically Secure Shield for Security IPs Protection · IEEE Trans. Computers 2017
Multi-variate High-Order Attacks of Shuffled Tables Recomputation · CHES 2015
Cryptographic primitives and cryptanalysis › cryptographic implementation
block cipher implementation
0.112018
Multivariate High-Order Attacks of Shuffled Tables Recomputation · J. Cryptol. 2018
Hardware security and side channels › side-channel attack
power analysis
0.112016
Correlated Extra-Reductions Defeat Blinded Regular Exponentiation · CHES 2016
Hardware security and side channels › hardware attacks
side-channel and fault attacks
0.112016
Correlated Extra-Reductions Defeat Blinded Regular Exponentiation · CHES 2016
Integrated circuit design › analog and mixed-signal circuits
mixed-signal circuit design
0.112016
PLL to the rescue: a novel EM fault countermeasure · DAC 2016
Integrated circuit design › analog and mixed-signal circuits › mixed-signal circuit design
phase-locked loop
0.112016
PLL to the rescue: a novel EM fault countermeasure · DAC 2016
Hardware security and side channels › side-channel countermeasures
masking
0.112015
Multi-variate High-Order Attacks of Shuffled Tables Recomputation · CHES 2015

Methods — techniques the papers use, named apart from their topics

PLL-based sensor · 0.5side-channel analysis · 0.2blinding countermeasures · 0.2multivariate high-order attacks · 0.2
YearPublicationVenuePosition
2021 On the Cost of ASIC Hardware Crackers: A SHA-1 Case Study
Anupam Chattopadhyay, Mustafa Khairallah, Gaëtan Leurent, Zakaria Najm, Thomas Peyrin, Vesselin Velichkov
CT-RSA4
2019 SoK: On DFA Vulnerabilities of Substitution-Permutation Networks
abstract
Recently, the NIST launched a competition for lightweight cryptography and a large number of ciphers are expected to be studied and analyzed under this competition. Apart from the classical security, the candidates are desired to be analyzed against physical attacks. Differential Fault Analysis (DFA) is an invasive physical attack method for recovering key information from cipher implementations. Up to date, almost all the block ciphers have been shown to be vulnerable against DFA, while following similar attack patterns. However, so far researchers mostly focused on particular ciphers rather than cipher families, resulting in works that reuse the same idea for different ciphers. In this article, we aim at bridging this gap, by providing a generic DFA attack method targeting Substitution-Permutation Network (SPN) based families of symmetric block ciphers. We provide the overview of the state-of-the-art of the fault attacks on SPNs, followed by generalized conditions that hold on all the ciphers of this design family. We show that for any SPN, as long as the fault mask injected before a non-linear layer in the last round follows a non-uniform distribution, the key search space can always be reduced. This shows that it is not possible to design an SPN-based cipher that is completely secure against DFA, without randomization. Furthermore, we propose a novel approach to find good fault masks that can leak the key with a small number of instances. We then developed a tool, called Joint Difference Distribution Table (JDDT) for pre-computing the solutions for the fault equations, which allows us to recover the last round key with a very small number of pairs of faulty and non-faulty ciphertexts. We evaluate our methodology on various block ciphers, including PRESENT-80, PRESENT-128, GIFT-64, GIFT-128, AES-128, LED-64, LED-128, Skinny, Pride and Prince. The developed technique would allow automated DFA analysis of several candidates in the NIST competitio
Mustafa Khairallah, Xiaolu Hou, Zakaria Najm, Jakub Breier, Shivam Bhasin, Thomas Peyrin
AsiaCCS3
2018 Multivariate High-Order Attacks of Shuffled Tables Recomputation
Nicolas Bruneau, Sylvain Guilley, Zakaria Najm, Yannick Teglia
J. Cryptol.3
2017 Cryptographically Secure Shield for Security IPs Protection
abstract
Probing attacks are serious threats on integrated circuits. Security products often include a protective layer called shield that acts like a digital fence. In this article, we demonstrate a new shield structure that is cryptographically secure. This shield is based on the lightweight block cipher and independent mesh lines to ensure the security against probing attacks of the hardware located behind the shield. Such structure can be proven secure against state-of-the-art invasive attacks. Then, we evaluate the impact of active shield on the performance of security IPs as PUF, TRNG, secure clock and AES using a set of fabricated ASICs with 65 nm CMOS technology of STMicroelectronics. Also, the impact of active shield on Side-Channel Attack (SCA) is evaluated.
Xuan Thuy Ngo, Jean-Luc Danger, Sylvain Guilley, Tarik Graba, Yves Mathieu, Zakaria Najm, Shivam Bhasin
IEEE Trans. Computers6
2016 Correlated Extra-Reductions Defeat Blinded Regular Exponentiation
Margaux Dugardin, Sylvain Guilley, Jean-Luc Danger, Zakaria Najm, Olivier Rioul
CHES4
2016 PLL to the rescue: a novel EM fault countermeasure
abstract
Electromagnetic injection (EMI) is a powerful and precise technique for fault injection in modern ICs. This intentional fault can be utilized to steal secret information hidden inside of ICs. Unlike laser fault injection, tedious package decapsulation is not needed for EMI, which reduces an attacker's cost and thus causes a serious information security threat. In this paper, a PLL-based sensor circuit is proposed to detect EMI reactively on chip. A fully automatic design flow is devised to integrate the proposed sensor together with a cryptographic processor. A high fault detection coverage and a small hardware overhead are demonstrated experimentally on an FPGA platform.
Noriyuki Miura, Zakaria Najm, Wei He 0015, Shivam Bhasin, Xuan Thuy Ngo, Makoto Nagata, Jean-Luc Danger
DAC2
2015 Multi-variate High-Order Attacks of Shuffled Tables Recomputation
Nicolas Bruneau, Sylvain Guilley, Zakaria Najm, Yannick Teglia
CHES3
2015 Hardware trojan detection by delay and electromagnetic measurements
Xuan Thuy Ngo, Ingrid Exurville, Shivam Bhasin, Jean-Luc Danger, Sylvain Guilley, Zakaria Najm, Jean-Baptiste Rigaud, Bruno Robisson
DATE6
2015 Integrated Sensor: A Backdoor for Hardware Trojan Insertions?
abstract
Embedded system face a serious threat from physical attacks when applied in critical applications. Therefore, modern systems have several integrated sensors to detect potential threats. In this paper, we put forward a new issue where these sensors can open other security loopholes. We demonstrate that sensors, which are deployed to prevent faults, can be exploited to insert effective and almost zero-overhead hardware Trojans. Two case studies are presented on Xilinx Virtex-5 FPGA. The first case study exploits the in-build temperature sensor of Virtex-5 system monitors while the other exploits a user deployed sensor. Both the sensor can be used to trigger a powerful Trojan with minimal and at times zero overhead.
Xuan Thuy Ngo, Zakaria Najm, Shivam Bhasin, Debapriya Basu Roy, Jean-Luc Danger, Sylvain Guilley
DSD2
2013 Time-Frequency Analysis for Second-Order Attacks
Pierre Belgarric, Shivam Bhasin, Nicolas Bruneau, Jean-Luc Danger, Nicolas Debande, Sylvain Guilley, Annelie Heuser, Zakaria Najm, Olivier Rioul
CARDIS8