Since the design and manufacturing of semiconductor chips takes a considerable amount of time, it is difficult to fully understand the entire process and conduct student experiments that provide a hands-on experience of chip creation. The lack of student experiments that allow beginners to easily experience the process from chip design to manufacturing is one of the reasons why there are few students interested in semiconductor research. This, in turn, exacerbates the shortage of skilled workers in the semiconductor industry. The Agile-Chip platform is a method that enables the rapid and low-cost production of small quantities of chips by manufacturing only the top wiring layer using minimal fab technology on cut wafers, which are pre-cut from mass-produced wafers except for the top-most wiring. In this paper, we propose a student experiment method for semiconductor beginners using the Agile-Chip platform and provide an implementation example. For the base chip, a gate array is used, which allows the configuration of various gates using only the top wiring layer. The students design a 61-stage ring oscillator using the gate array, verify its operation through simulation, and then proceed with the corresponding layout design. After confirming the consistency of both, they generate a GDS file. This wiring layer is then fabricated either in a minimal fab or a cleanroom, and finally, the chip is mounted on a substrate for measurement.

Scaling to finer CMOS process nodes necessitates more masks, resulting in higher costs and extended turnaround times (TATs). High costs and long TATs have hindered researchers outside the field of integrated circuits, including those in medicine, physics, and science from prototyping their own chips. Therefore, opportunities for diverse innovations in integrated circuits and talent development have been limited. We have developed the Agile-X platform for low-cost, rapid manufacturing of system-on-chips. Users can implement their own dedicated circuits with gate-array circuits on a base chip, which has common intellectual properties (IPs) such as RISC-V CPUs, various IOs, and ADCs. The base chip is manufactured in a foundry up to the intermediate metal layers and shipped with metal deposition on its surface. By directly drawing wiring patterns on this base chip with a mask-less lithography system, custom chips can be manufactured on-site without masks. As this process only requires wiring and eliminates masks, production time is drastically reduced compared to traditional full-mask wafer processes and multiproject wafer (MPW) shuttles. Development and manufacturing costs for the base chip, including preintegrated IPs, are shared among all Agile-X users. This reduces both IP and base-chip wafer costs per user. We prototyped wafers using a 0.18-$\mu $m CMOS process and tested the proposed structured ASIC platform and manufacturing process using mask-less lithography systems. The results indicate that the process from inputting GDS data to lithography and dry etching can be completed within 30 min, and custom application-specific integrated circuits (ASICs) can be manufactured within a day. Compared with full-mask wafer design and manufacturing, the manufacturing cost per chip, including IP costs, is reduced from 271000 USD to 22 USD, a reduction of 1/12252, and the manufacturing period is reduced from 20 days to 30 min, a reduction of 1/960.