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Bhaskar Bharath

dblp:136/1293 · DBLP profile ↗
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1ranked-venue papers
0as first author
0since 2021 · last 2015
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Applied, interdisciplinary, general and emerging computing · 1

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Integrated circuit design · 77% Reconfigurable computing and FPGAs · 12% Electronic design automation · 12%

Topics — the 2 heaviest of 4, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Integrated circuit design
analog and mixed-signal circuits
0.212015
Analog- and Mixed-Signal Fabrics · Proc. IEEE 2015
Integrated circuit design › analog and mixed-signal circuits › analog VLSI
field programmable analog array
0.212015
Analog- and Mixed-Signal Fabrics · Proc. IEEE 2015
YearPublicationVenuePosition
2015 Analog- and Mixed-Signal Fabrics
abstract
Alternatives to traditional full-custom analog/mixed-signal application-specific integrated circuits (ASICs) are described. These novel approaches apply many of the concepts of deep-submicrometer digital structured arrays and field-programmable gate arrays (FPGAs) to analog design and fabrication methodologies. Field- and mask-programmable analog architectures are compared and contrasted to the long-standing full custom approach. In addition, the impact of electronic design automation (EDA) tools, which are critical cost-effective, wide-spread deployment of these new approaches, is discussed. Finally, the changes in manufacturing and fabrication processes to support production of field- and mask-programmable analog/mixed-signal devices will be presented.
James C. Kemerling, Robert Greenwell, Bhaskar Bharath
Proc. IEEE3