Demo Data from EDBT 2026 / reviewers in the wild / expert
Cheng-Yuan Wang
dblp:137/7777
· DBLP profile ↗
2ranked-venue papers
1as first author
2since 2021 · last 2022
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Systems, architecture and hardware · 2 · 1 first-author · 2 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Electronic design automation · 100% | |
| Theoretical computer science
1 paper |
Mathematical optimization · 100% |
Topics — the 5 heaviest of 5, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Electronic design automation › physical design › placement
circuit placement |
0.6 | 1 | 2022 | Flexible chip placement via reinforcement learning: late breaking results · DAC 2022 |
Electronic design automation › physical design › placement › module placement
macro placement |
0.6 | 1 | 2022 | Flexible chip placement via reinforcement learning: late breaking results · DAC 2022 |
Electronic design automation
physical design |
0.6 | 1 | 2022 | Flexible chip placement via reinforcement learning: late breaking results · DAC 2022 |
Mathematical optimization
multi-objective optimization |
0.2 | 1 | 2022 | Flexible chip placement via reinforcement learning: late breaking results · DAC 2022 |
Mathematical optimization › multi-objective optimization
pareto front |
0.2 | 1 | 2022 | Flexible chip placement via reinforcement learning: late breaking results · DAC 2022 |
Methods — techniques the papers use, named apart from their topics
reinforcement learning · 1.1multi-objective reinforcement learning · 1.1
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2022 | Flexible chip placement via reinforcement learning: late breaking resultsabstractRecently, successful applications of reinforcement learning to chip placement have emerged. Pretrained models are necessary to improve efficiency and effectiveness. Currently, the weights of objective metrics (e.g., wirelength, congestion, and timing) are fixed during pretraining. However, fixed-weighed models cannot generate the diversity of placements required for engineers to accommodate changing requirements as they arise. This paper proposes flexible multiple-objective reinforcement learning (MORL) to support objective functions with inference-time variable weights using just a single pretrained model. Our macro placement results show that MORL can generate the Pareto frontier of multiple objectives effectively. Fu-Chieh Chang 0001, Yu-Wei Tseng, Ya-Wen Yu, Ssu-Rui Lee, Alexandru Cioba, I-Lun Tseng, Da-Shan Shiu, Jhih-Wei Hsu, Cheng-Yuan Wang, Chien-Yi Yang, Ren-Chu Wang, Yao-Wen Chang, Tai-Chen Chen, Tung-Chieh Chen |
DAC | 9 |
| 2022 | SGIRR: Sparse Graph Index Remapping for ReRAM Crossbar Operation Unit and Power OptimizationabstractResistive Random Access Memory (ReRAM) Crossbars are a promising process-in-memory technology to reduce enormous data movement overheads of large-scale graph processing between computation and memory units. ReRAM cells can combine with crossbar arrays to effectively accelerate graph processing, and partitioning ReRAM crossbar arrays into Operation Units (OUs) can further improve computation accuracy of ReRAM crossbars. The operation unit utilization was not optimized in previous work, incurring extra cost. This paper proposes a two-stage algorithm with a crossbar OU-aware scheme for sparse graph index remapping for ReRAM (SGIRR) crossbars, mitigating the influence of graph sparsity. In particular, this paper is the first to consider the given operation unit size with the remapping index algorithm, optimizing the operation unit and power dissipation. Experimental results show that our proposed algorithm reduces the utilization of crossbar OUs by 31.4%, improves the total OU block usage by 10.6%, and saves energy consumption by 17.2%, on average. Cheng-Yuan Wang, Yao-Wen Chang, Yuan-Hao Chang 0001 |
ICCAD | 1 |