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Nikunj Bajaj

dblp:137/8278 · DBLP profile ↗
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2ranked-venue papers
1as first author
0since 2021 · last 2020
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2 · 1 first-authorSoftware engineering, systems software and programming languages · 1 · 1 first-author

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Embedded and real-time systems · 50% Hardware reliability and fault tolerance · 50%

Topics — the 2 heaviest of 2, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Embedded and real-time systems › cyber-physical systems
cyber-physical system design
0.412020
Optimized Selection of Reliable and Cost-Effective Safety-Critical System Architectures · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2020
Hardware reliability and fault tolerance
design for reliability
0.412020
Optimized Selection of Reliable and Cost-Effective Safety-Critical System Architectures · IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2020

Methods — techniques the papers use, named apart from their topics

optimization · 0.4graph-based reliability analysis · 0.4
YearPublicationVenuePosition
2020 Optimized Selection of Reliable and Cost-Effective Safety-Critical System Architectures
abstract
We address the problem of synthesizing safety-critical embedded and cyber-physical system architectures to minimize a cost function while guaranteeing the desired reliability. We represent a system architecture as a configurable graph in which both the nodes (components) and edges (interconnections) may fail. We then propose a compact analytical formalism to efficiently reason about the reliability of the overall system based on the failure probabilities of the components, and provide expressions of the design constraints that avoid exhaustive enumeration of failure cases on all possible graph configurations. Based on these constraints, we cast the synthesis problem as an optimization problem and propose monolithic and iterative optimization schemes to decrease the problem complexity. We implement the proposed algorithms in the ArchEx framework, leveraging a pattern-based specification language to facilitate problem formulation. Design problems from aircraft electric power distribution networks and reconfigurable industrial manufacturing systems illustrate the effectiveness of our approach.
Pierluigi Nuzzo 0002, Nikunj Bajaj, Michael Masin, Dmitrii Kirov, Roberto Passerone, Alberto L. Sangiovanni-Vincentelli
IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.2
2015 Optimized selection of reliable and cost-effective cyber-physical system architectures
Nikunj Bajaj, Pierluigi Nuzzo 0002, Michael Masin, Alberto L. Sangiovanni-Vincentelli
DATE1