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Eduard Gil

dblp:137/9182 · DBLP profile ↗
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2ranked-venue papers
0as first author
0since 2021 · last 2014
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 2

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer architecture, parallel and distributed computing, and storage systems
1 paper
Parallel and multicore computing · 87% Reconfigurable computing and FPGAs · 13%

Topics — the 2 heaviest of 3, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Parallel and multicore computing › parallel programming models
directive-based programming
0.212014
OmpSs@Zynq all-programmable SoC ecosystem · FPGA 2014
Parallel and multicore computing
parallel programming models
0.212014
OmpSs@Zynq all-programmable SoC ecosystem · FPGA 2014

Methods — techniques the papers use, named apart from their topics

task dependency management · 0.2
YearPublicationVenuePosition
2014 OmpSs@Zynq all-programmable SoC ecosystem
abstract
OmpSs is an OpenMP-like directive-based programming model that includes heterogeneous execution (MIC, GPU, SMP, etc.) and runtime task dependencies management. Indeed, OmpSs has largely influenced the recently appeared OpenMP 4.0 specification. Zynq All-Programmable SoC combines the features of a SMP and a FPGA and benefits DLP, ILP and TLP parallelisms in order to efficiently exploit the new technology improvements and chip resource capacities. In this paper, we focus on programmability and heterogeneous execution support, presenting a successful combination of the OmpSs programming model and the Zynq All-Programmable SoC platforms.
Antonio Filgueras, Eduard Gil, Daniel Jiménez-González, Carlos Álvarez 0001, Xavier Martorell, Jan Langer, Juanjo Noguera, Kees A. Vissers
FPGA2
2013 Heterogeneous tasking on SMP/FPGA SoCs: The case of OmpSs and the Zynq
abstract
OmpSs is a directive-based programming model that uses OpenMP-like directives, that allow to execute the tasks annotated on both the SMPs and as FPGA kernels on modern SoC processors, like the Xilinx Zynq platform. OmpSs includes the support for accelerators (MIC, GPUs, FPGAs) and task dependencies, like OpenMP 4.0 will support. In this paper we present our approach for the support of FPGAs and the Zynq SoC, the current status of the implementation, its analysis and performance evaluation.
Antonio Filgueras, Eduard Gil, Carlos Álvarez 0001, Daniel Jiménez-González, Xavier Martorell, Jan Langer, Juanjo Noguera
VLSI-SoC2