Pydi Bahubalindruni

dblp:138/2698 · also Pydi Ganga Bahubalindruni · DBLP profile ↗
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11ranked-venue papers
1as first author
4since 2021 · last 2023
—ORCID · conflict

Domains — the database's venue-derived domains; a paper can count in several

Systems, architecture and hardware · 11 · 1 first-author · 4 since 2021
YearPublicationVenuePosition
2023 Low-Voltage Clocked Comparator With Flexible Oxide TFT Technology
abstract
This paper presents a novel clocked comparator circuit using amorphous indium gallium zinc oxide (a-IGZO) thin-film transistor technology. The circuit is fabricated on a 30$\mu \mathrm{m}$flexible polymide substrate. Experimental characterization took place under normal ambient conditions. The comparator circuit employs inverters using pseudo CMOS topology to obtain better swing. It employs a clocked architecture, where the pre-amplification and regeneration phases are controlled by this clock. From measurements, the circuit is showing a VinCMof 1V - 2.5 V, power consumption of 80$\mu \mathrm{W}$average input static offset of 119mV and a swing of 70% at a clock frequency of 5 MHz and an input signal frequency of 5 kHz with a supply voltage$(\mathrm{V}_{\text{DD}})$of 4 V. This circuit is showing a 62.5% improvement in speed compared to the state-of-the-art work at a relatively low$\mathrm{V}_{\text{DD}}$using single-gate a-IGZO TFT technology. This circuit finds potential applications in smart sensing systems on flexible substrates.
Suyash Shrivastava, Pydi Bahubalindruni, Nishtha Kansal
ISCAS2
2022 Temperature Sensing System With Flexible Electronics Using Oxide TFTs
abstract
This paper presents a novel temperature sensing system using amorphous indium gallium zinc oxide (a-IGZO) thin-film transistor technology for the first time. The system is composed of temperature sensing matrix, a low pass filter and a comparator to sense the increase in temperature beyond the reference value. As an example, human body temperature detection is demonstrated with a single bit output, where the reference temperature is 37°C. The proposed system shows a resolution of 0.1°C with a supply voltage $(\mathrm{V}_{{\mathrm {DD}}})$ of 4V and power consumption of $210 \mu \mathrm{W}$, at a clock frequency of 100KHz. The comparator employs bootstrapped load in the latch to enhance the performance, showing a resolution of 0.15mV with the same $\mathrm{V}_{{\mathrm {DD}}}$ and clock frequency. This system finds potential applications in flexible biomedical healthcare devices and in smart packaging to monitor the temperature of critical items like medicines and provide useful information to the end user.
Suyash Shrivastava, Pydi Bahubalindruni
ISCAS2
2021 Low-Power High Sensitive Capacitance Read-Out Circuit Using a-InGaZnO TFTs
abstract
This paper presents a capacitance readout circuit with high sensitivity and low power consumption using amorphous-Indium-Gallium-Zinc-Oxide thin-film transistors (a- InGaZnO TFTs). A relaxation oscillator is proposed to convert the sensor output (capacitance) into frequency. The proposed circuit has bootstrapping load to improve the output voltage swing using unipolar transistors. A differential to single ended converter and a buffer are used to get rail to rail output voltage. Simulation results show an improvement in sensitivity (832 Hz/pF) and power consumption (1.4 mW) as compared to the conventional ring oscillator based designs (142 Hz/pF, 1.9 mW) when circuits are simulated with a power supply of 10V, without compromising voltage swing. Therefore, this circuit finds potential application to implement sensing systems with flexible electronics.
Prabal Bhatnagar, Pydi Bahubalindruni, Pedro Barquinha
ISCAS2
2021 Mostly Passive Δ - Σ ADC with a-IGZO TFTs for Flexible Electronics
abstract
This paper presents a novel mostly passive Δ-Σ ADC using amorphous Indium Gallium Zinc Oxide (a-IGZO) thin-film transistors (TFTs). The ADC circuit consists of passive elements (resistors and capacitors), a novel dynamic comparator, a D-Flip Flop and a pseudo-CMOS BS inverter. In-house oxide TFT model is used for circuit simulations in Cadence environment. The proposed ADC results in effective-number-of-bits (ENOB) of 11.2 bits and a figure-of-merit (FOM) of 0.15 μJ/conversion step at 2 kHz sampling frequency with a 10 V power supply. This circuit would find potential applications in biomedical wearable systems, in which, the ADC is probably the most important block.
Nishtha Wadhwa, Pydi Bahubalindruni, Ana Correia 0002, João Goes, Sujay Deb, Pedro Barquinha
ISCAS2
2020 High Speed Operational Amplifier using a-InGaZnO TFTs with Negative Capacitance
abstract
This paper presents a novel high speed operational amplifier using a-IGZO TFTs for a given technology, without changing device structure, processing conditions and materials. In the proposed design, a negative capacitance generator (NCG) is employed, using a-IGZO TFTs, which is connected to the output of a positive feedback operational amplifier. This technique helps to move the output pole of the amplifier to very high frequency by reducing the overall equivalent capacitance (Ceq) at the output node, as the negative capacitance is in parallel with Ceq. By using this technique, the unity gain bandwidth (GB) of the opamp is increased from 486 kHz to 1.474 MHz without compromising other performance metrics, such as, gain and stability (phase margin). However power consumption is increased from 0.3mW to 0.6 mW, when the simulations took place with in-house IGZO TFT models. Both NCG and the amplifier were designed with a minimum feature size of 10 μm and a power supply of 10V and 15V, respectively.
Ricardo Rodrigues 0007, Pydi Bahubalindruni, Pedro Barquinha
ISCAS2
2020 Low-Power Ethanol Sensor Read-Out Circuit using a-InGaZnO TFTs
abstract
This paper presents a low-power ethanol sensing read-out circuit using amorphous-Indium-Gallium-Zinc-Oxide thin-film transistors (a-InGaZnO TFTs). The read-out circuit is implemented with a proposed low-power high-speed ring oscillator (RO). The proposed RO employs bootstrapped pseudo-CMOS inverter, whose delay and power are reduced by using intermediate signals generated within the RO, hence, ensuring a high frequency of oscillations and low-power consumption. This design further ensures improved sensitivity of the readout circuit. To validate the proposed idea, 9-stage conventional low-power and proposed ROs have been designed and simulated using in-house a-InGaZnO TFT models at a supply voltage of 8V. Simulation results show that the proposed RO provides 11.8% improvement in the frequency of oscillations and 18.5% reduction in power consumption compared to the conventional design. Further, the proposed circuit has shown an improvement of 9% in the sensitivity compared to the conventional design. Therefore, this circuit finds potential application in read-out sensing systems.
Bhawna Tiwari, Prabal Bhatnagar, Pydi Bahubalindruni, Pedro Barquinha
ISCAS3
2020 Robust DC-DC Converter using a-InGaZnO TFTs for Self-Contained Electronics
abstract
This paper demonstrates, for the first time, the effect of bias stress on the performance of two amorphous Indiumgallium-Zinc Oxide (a-IGZO) thin-film transistor (TFTs) based DC-DC converters, when they are tested close to real-world operating conditions. The individual circuits (Dickson and Cross-coupled DC-DC converters) are characterized under normal ambient with and without continuous bias stress. Under no stress condition, Dickson and Cross-coupled converters are showing almost constant voltages of 3.8V (8.5V), 3.9V (9.3V), when tested at different clock frequencies of 0.25, 1, 5 MHz with a single (a series of two) thin-film batteries, where each battery shows 3V output voltage. When a Cross-coupled DC-DC converter with 6V input is driving other similar circuit, the final output of 16.5V is noticed, demonstrating self-contained electronics with oxide TFTs. Further, individual circuits were stressed for 18000 seconds to mimic real-world conditions. The Dickson (Cross-coupled) converter has shown a variation of 12% (0.7%) and 5% (0.5%) in output DC voltage when tested with a single and a series connection of two batteries, respectively. This work opens a window for self-contained electronics with oxide TFTs under real-world operating conditions.
Bhawna Tiwari, Pydi Bahubalindruni, Pradeep Mahato
ISCAS2
2019 Bootstrapping Circuit with IGZO TFTs for On-Chip Power Supply Generation
abstract
This paper reports a novel bootstrapping circuit with IGZO TFTs to generate on-chip power supply, mainly for real-time flexible wearable continuous health monitoring system. In order to ensure a compact and reliable system without complex external connections, on-chip power supply is required, to drive biological signal processing or conditioning circuits with IGZO TFTs. Though, integrated system (circuits with oxide TFTs and thin film batteries) can be achieved with printing technique, with the state of art, commercially available thin film printed batteries are confined to 3 V. Typically, flexible electronics with IGZO TFTs needs a power supply > 5 V (depending on the dielectric). The proposed bootstrapping (BS) circuit with IGZO TFTs can generate 2*VDDand 3*VDDwith the printed batteries output voltage of around 3 V. The proposed circuit is tested with an input voltage spanning between 2 to 10 V and clock frequency up to 1 MHz. When the input voltage is 3 V with the load of 5 MΩ and 2 MΩ, the output which is acquired is 7.9 V and 6.4 V, respectively, with the respective power dissipation of 24.9 μW and 50.8 μW. The circuit simulations are carried out using IGZO TFT model in cadence virtuoso environment, which demonstrate that the BS circuit plays a vital role in the on-chip supply generation for wearable biomedical systems.
Nishtha Wadhwa, Pydi Bahubalindruni, Sujay Deb, Pedro Barquinha
ISCAS2
2018 A Voltage Controlled Oscillator Using IGZO Thin-Film Transistors
abstract
This paper presents a voltage controlled oscillator (VCO) using amorphous Indium Gallium Zinc Oxide (a-IGZO) thin-film transistors (TFTs). This circuit consists of a high-gain OpAmp, a comparator and a relaxation oscillator. The implemented relaxation oscillator shows a power consumption of 700 μW, when it is simulated with a supply rail of ±5 V. It shows a frequency of oscillation range from 327 to 560 Hz, when the tuning capacitance value varies from 1.6 to 5 pF. On the other hand, the VCO has a power dissipation of 1.3 mW with frequency ranging from 400 to 556 Hz with a controlling voltage from −5 to 5 V. In-house oxide TFT model is used for circuit simulations in Cadence environment. This circuit finds potential applications in large-area flexible systems, namely smart packaging, biomedical and wearable systems, which needs clocks with different frequencies.
Tejaswini Keragodu, Bhawna Tiwari, Nishtha Wadhwa, Pydi Bahubalindruni, João Goes, Pedro Barquinha
ISCAS4
2017 A robust fully-dynamic residue amplifier for two-stage SAR assisted pipeline ADCs
abstract
This paper proposes a robust, 3-stage fully-dynamic high-gain residue amplifier for a 12-bit 80MS/s two-stage SAR assisted pipeline ADC. Parametric amplification has been used in the proposed open-loop amplifier to enhance gain. Third stage of the circuit is implemented with dynamic source followers (DSFs), which contributed to gain enhancement and also promised a robust performance against different loads and process corners. The circuit has shown a gain of 31 dB, a power consumption of 0.1 mW and an operating frequency of approximately 1 GHz from simulations. Circuit corner performance is varying almost within ±1 dB in gain and ±20% in bandwidth from the nominal. Circuit simulations have been carried out in standard 65 nm CMOS technology with a power supply of 1 V.
Shreya Singh, Pydi Bahubalindruni, João Goes
ISCAS2
2016 Novel linear analog-adder using a-IGZO TFTs
abstract
A novel linear analog adder is proposed only with n-type enhancement IGZO TFTs that computes summation of four voltage signals. However, this design can be easily extended to perform summation of higher number of signals, just by adding a single TFT for each additional signal in the input block. The circuit needs few number of transistors, only a single power supply irrespective of the number of voltage signals to be added, and offers good accuracy over a reasonable range of input values. The circuit was fabricated on glass substrate with the annealing temperature not exceeding 200° C. The circuit performance is characterized from measurements under normal ambient at room temperature, with a power supply voltage of 12 V and a load of ≈ 4 pF. The designed circuit has shown a linearity error of 2.3% (until input signal peak to peak value is 2 V), a power consumption of 78 μW and a bandwidth of ≈ 115 kHz, under the worst case condition (when it is adding four signals with the same frequency). In this test setup, it has been noticed that the second harmonic is 32 dB below the fundamental frequency component. This circuit could offer an economic alternative to the conventional approaches, being an important contribution to increase the functionality of large area flexible electronics.
Pydi Bahubalindruni, Vítor Grade Tavares, Elvira Fortunato, Pedro Barquinha
ISCAS1