EDBT 2026 Demo / reviewers in the wild / expert
Geunyeong Yu
dblp:139/0907
· DBLP profile ↗
2ranked-venue papers
1as first author
1since 2021 · last 2022
—ORCID · none
Domains — the database's venue-derived domains; a paper can count in several
Computer networks · 2 · 1 first-author · 1 since 2021
Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.
| Theoretical computer science
1 paper |
Coding theory · 100% | |
| Computer architecture, parallel and distributed computing, and storage systems
1 paper |
Storage systems · 100% |
Topics — the 6 heaviest of 6, each with the papers that count most for it
| Topic | Weight | Papers | Last | Evidence papers |
|---|---|---|---|---|
Storage systems
flash and SSD |
0.2 | 1 | 2014 | Concatenated Raptor Codes in NAND Flash Memory · IEEE J. Sel. Areas Commun. 2014 |
Storage systems › flash and SSD › flash memory reliability
NAND flash error correction |
0.2 | 1 | 2014 | Concatenated Raptor Codes in NAND Flash Memory · IEEE J. Sel. Areas Commun. 2014 |
Coding theory › error-correcting codes
concatenated codes |
0.2 | 1 | 2014 | Concatenated Raptor Codes in NAND Flash Memory · IEEE J. Sel. Areas Commun. 2014 |
Coding theory › error-correcting codes › rateless codes › fountain codes
raptor codes |
0.2 | 1 | 2014 | Concatenated Raptor Codes in NAND Flash Memory · IEEE J. Sel. Areas Commun. 2014 |
Coding theory › error-correcting codes › decoding › iterative decoding
iterative hard-decision decoding |
0.1 | 1 | 2014 | Concatenated Raptor Codes in NAND Flash Memory · IEEE J. Sel. Areas Commun. 2014 |
Coding theory › error-correcting codes › block codes
product codes |
0.1 | 1 | 2014 | Concatenated Raptor Codes in NAND Flash Memory · IEEE J. Sel. Areas Commun. 2014 |
Methods — techniques the papers use, named apart from their topics
raptor encoding · 0.4look-up-table strategy · 0.4BCH codes · 0.4
| Year | Publication | Venue | Position |
|---|---|---|---|
| 2022 | ECC-Aided RAID for Reliability Improvement of SSDabstractIn the field of solid state drive (SSD), redundant array of inexpensive disk (RAID) is of great use due to its reliability and performance. In terms of reliability, RAID can be further enhanced with the help of error-correction code (ECC), which is another core technology for SSD applications. Recently, joint ECC-RAID schemes have been proposed for the reliability of SSD. Especially, due to high reliability with low computational complexity, joint ECC-RAID schemes based on RAID-5, denoted as ECC-RAID-5, are popularly adopted to devices as well as systems of data storage. In this paper, a new family of joint ECC-RAID schemes, called ECC-aided RAID (EA-RAID), are proposed to further improve the reliability of the joint ECC-RAID schemes in the data storage applications. In the EA-RAID, new types of data checking and regenerating algorithms based on soft-decision (SD) are introduced to enhance the error-correcting capability of the cooperative ECC decoding. The EA-RAID increases error-correction capability as at least 15% and 7% gain compared with the ECC-only schemes and the conventional ECC-RAID-5, respectively. The improvement is demonstrated by productized SSD based on virtuaI3-bit-over multi-level cell (MLC) NAND. It is expected that the proposed technologies can be introduced as a potential solution for next generation NAND. Kangseok Lee, Geunyeong Yu, Youngjun Hwang, Bohwan Jun, Hongrak Son, Yong Ho Song |
GLOBECOM | 2 |
| 2014 | Concatenated Raptor Codes in NAND Flash MemoryabstractTwo concatenated coding schemes based on fixed-rate Raptor codes are proposed for error control in NAND flash memory. One is geared for off-line recovery of uncorrectable pages and the other is designed for page error correction during the normal read mode. Both proposed coding strategies assume hard-decision decoding of the inner code with inner decoding failure generating erasure symbols for the outer Raptor code. Raptor codes allow low-complexity decoding of very long codewords while providing capacity-approaching performance for erasure channels. For the off-line page recovery scheme, one whole NAND block forms a Raptor codeword with each inner codeword typically made up of several Raptor symbols. An efficient look-up-table strategy is devised for Raptor encoding and decoding which avoids using large buffers in the controller despite the substantial size of the Raptor code employed. The potential performance benefit of the proposed scheme is evaluated in terms of the probability of block recovery conditioned on the presence of uncorrectable pages. In the suggested page-error-correction strategy, on the other hand, a hard-decision-iterating product code is used as the inner code. The specific product code employed in this work is based on row-column concatenation with multiple intersecting bits to allow the use of longer component codes. In this setting the collection of bits captured within each intersection of the row-column codes acts as the Raptor symbol(s), and the intersections of failed row codes and column codes are declared as erasures. The error rate analysis indicates that the proposed concatenation provides a considerable performance boost relative to the existing error correcting system based on long Bose-Chauduri-Hocquenghem (BCH) codes. Geunyeong Yu, Jaekyun Moon |
IEEE J. Sel. Areas Commun. | 1 |