Tom Edsall

dblp:139/4063 · DBLP profile ↗
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8ranked-venue papers
0as first author
1since 2021 · last 2023
—ORCID · none

Domains — the database's venue-derived domains; a paper can count in several

Computer networks · 7Systems, architecture and hardware · 1 · 1 since 2021

Expertise — from the expertise taxonomy: the topics of the expert's papers under the CCF categories. A weight counts papers with recency: 1 for a paper about the topic, 0.3 when the topic is its context, halved every five years.

Computer networks
7 papers
Datacenter networks · 48% Transport protocols and congestion control · 20% Software-defined and programmable networks · 17%
Computer architecture, parallel and distributed computing, and storage systems
2 papers
Reconfigurable computing and FPGAs · 54% Hardware accelerators and domain-specific architectures · 46%

Topics — the 14 heaviest of 17, each with the papers that count most for it

TopicWeightPapersLastEvidence papers
Transport protocols and congestion control › active queue management
PI controller
1.122023
Congestion Control for Datacenter Networks: A Control-Theoretic Approach · IEEE Trans. Parallel Distributed Syst. 2023
RoCC: robust congestion control for RDMA · CoNEXT 2020
Datacenter networks › RDMA
RDMA congestion control
1.122023
Congestion Control for Datacenter Networks: A Control-Theoretic Approach · IEEE Trans. Parallel Distributed Syst. 2023
RoCC: robust congestion control for RDMA · CoNEXT 2020
Datacenter networks › load balancing
flowlet switching
0.522017
Let It Flow: Resilient Asymmetric Load Balancing with Flowlet Switching · NSDI 2017
CONGA: distributed congestion-aware load balancing for datacenters · SIGCOMM 2014
Datacenter networks
load balancing
0.522017
Let It Flow: Resilient Asymmetric Load Balancing with Flowlet Switching · NSDI 2017
CONGA: distributed congestion-aware load balancing for datacenters · SIGCOMM 2014
Software-defined and programmable networks
programmable data plane
0.422023
Programmable Packet Scheduling at Line Rate · SIGCOMM 2016
Congestion Control for Datacenter Networks: A Control-Theoretic Approach · IEEE Trans. Parallel Distributed Syst. 2023
Internet architecture and protocols
packet scheduling
0.212016
Programmable Packet Scheduling at Line Rate · SIGCOMM 2016
Internet architecture and protocols › packet scheduling
programmable packet scheduling
0.212016
Programmable Packet Scheduling at Line Rate · SIGCOMM 2016
Software-defined and programmable networks › programmable data plane
p4 implementation
0.212023
Congestion Control for Datacenter Networks: A Control-Theoretic Approach · IEEE Trans. Parallel Distributed Syst. 2023
Datacenter networks › load balancing
congestion-aware load balancing
0.212014
CONGA: distributed congestion-aware load balancing for datacenters · SIGCOMM 2014
Datacenter networks
datacenter transport
0.212014
CONGA: distributed congestion-aware load balancing for datacenters · SIGCOMM 2014
Cellular and mobile networks › ultra-low latency services › tactile internet
ultra-low-latency communication
0.112012
Less Is More: Trading a Little Bandwidth for Ultra-Low Latency in the Data Center · NSDI 2012
Datacenter networks › lossless ethernet
priority flow control
0.112020
RoCC: robust congestion control for RDMA · CoNEXT 2020
Routing and switching
traffic engineering
0.112017
Let It Flow: Resilient Asymmetric Load Balancing with Flowlet Switching · NSDI 2017
Reconfigurable computing and FPGAs
reconfigurable computing
0.112017
dRMT: Disaggregated Programmable Switching · SIGCOMM 2017

Methods — techniques the papers use, named apart from their topics

PI control · 1.1control theory · 0.7p4 · 0.4flowlet switching · 0.3flowlet · 0.2distributed congestion feedback · 0.2
YearPublicationVenuePosition
2023 Congestion Control for Datacenter Networks: A Control-Theoretic Approach
abstract
In this paper, we presentRoCC, a robust congestion control approach for datacenter networks based on RDMA.RoCCleverages switch queue size as an input to a PI controller, which computes the fair data rate of flows in the queue. The PI parameters are self-tuning to guarantee stability, rapid convergence, and fair and near-optimal throughput in a wide range of congestion scenarios. Our simulation and DPDK implementation results show thatRoCCcan achieve up to$7\times$reduction in PFC frames generated under high load levels, compared to DCQCN. At the same time,RoCCcan achieve$1.7 - 4.5\times$and$1.4 - 3.9\times$lower tail latency for long flows and$2.1-7\times$and$3.5-8.2\times$lower tail latency for short flows, compared to DCQCN and HPCC, respectively. We also find thatRoCCdoes not require PFC. The functional components ofRoCCcan be efficiently implemented in P4 and FPGA-based switch hardware.
Danushka Menikkumbura, Parvin Taheri, Erico Vanini, Sonia Fahmy, Patrick Eugster, Tom Edsall
IEEE Trans. Parallel Distributed Syst.6
2020 RoCC: robust congestion control for RDMA
abstract
In this paper, we present RoCC, a robust congestion control approach for datacenter networks based on RDMA. RoCC leverages switch queue size as an input to a PI controller, which computes the fair data rate of flows in the queue, signaling it to the flow sources. The PI parameters are self-tuning to guarantee stability, rapid convergence, and fair and near-optimal throughput in a wide range of congestion scenarios. Our simulation and DPDK implementation results show that RoCC can achieve up to 7× reduction in PFC frames generated under high average load levels, compared to DCQCN. At the same time, RoCC can achieve up to 8× lower tail latency, compared to DCQCN and HPCC. We also find that RoCC does not require PFC. The functional components of RoCC are implementable in P4-based and fixed-function switch ASICs.
Parvin Taheri, Danushka Menikkumbura, Erico Vanini, Sonia Fahmy, Patrick Eugster, Tom Edsall
CoNEXT6
2017 Let It Flow: Resilient Asymmetric Load Balancing with Flowlet Switching
Erico Vanini, Mohammad Alizadeh, Parvin Taheri, Tom Edsall
NSDI5
2017 dRMT: Disaggregated Programmable Switching
abstract
We present dRMT (disaggregated Reconfigurable Match-Action Table), a new architecture for programmable switches. dRMT overcomes two important restrictions of RMT, the predominant pipeline-based architecture for programmable switches: (1) table memory is local to an RMT pipeline stage, implying that memory not used by one stage cannot be reclaimed by another, and (2) RMT is hardwired to always sequentially execute matches followed by actions as packets traverse pipeline stages. We show that these restrictions make it difficult to execute programs efficiently on RMT.
Sharad Chole, Andy Fingerhut, Sha Ma, Anirudh Sivaraman, Shay Vargaftik, Alon Berger, Gal Mendelson, Mohammad Alizadeh, Shang-Tse Chuang, Isaac Keslassy, Ariel Orda, Tom Edsall
SIGCOMM12
2016 Programmable Packet Scheduling at Line Rate
abstract
Switches today provide a small menu of scheduling algorithms. While we can tweak scheduling parameters, we cannot modify algorithmic logic, or add a completely new algorithm, after the switch has been designed. This paper presents a design for a {\em programmable} packet scheduler, which allows scheduling algorithms---potentially algorithms that are unknown today---to be programmed into a switch without requiring hardware redesign.
Anirudh Sivaraman, Suvinay Subramanian, Mohammad Alizadeh, Sharad Chole, Shang-Tse Chuang, Anurag Agrawal, Hari Balakrishnan, Tom Edsall, Sachin Katti, Nick McKeown
SIGCOMM8
2015 Towards Programmable Packet Scheduling
abstract
Packet scheduling in switches is not programmable; operators only choose among a handful of scheduling algorithms implemented by the manufacturer. In contrast, other switch functions such as packet parsing and header processing are becoming programmable [10, 3, 6]. This paper presents a programmable packet scheduler that allows operators to program a variety of scheduling algorithms.
Anirudh Sivaraman, Suvinay Subramanian, Anurag Agrawal, Sharad Chole, Shang-Tse Chuang, Tom Edsall, Mohammad Alizadeh, Sachin Katti, Nick McKeown, Hari Balakrishnan
HotNets6
2014 CONGA: distributed congestion-aware load balancing for datacenters
abstract
We present the design, implementation, and evaluation of CONGA, a network-based distributed congestion-aware load balancing mechanism for datacenters. CONGA exploits recent trends including the use of regular Clos topologies and overlays for network virtualization. It splits TCP flows into flowlets, estimates real-time congestion on fabric paths, and allocates flowlets to paths based on feedback from remote switches. This enables CONGA to efficiently balance load and seamlessly handle asymmetry, without requiring any TCP modifications. CONGA has been implemented in custom ASICs as part of a new datacenter fabric. In testbed experiments, CONGA has 5x better flow completion times than ECMP even with a single link failure and achieves 2-8x better throughput than MPTCP in Incast scenarios. Further, the Price of Anarchy for CONGA is provably small in Leaf-Spine topologies; hence CONGA is nearly as effective as a centralized scheduler while being able to react to congestion in microseconds. Our main thesis is that datacenter fabric load balancing is best done in the network, and requires global schemes such as CONGA to handle asymmetry.
Mohammad Alizadeh, Tom Edsall, Sarang Dharmapurikar, Ramanan Vaidyanathan, Kevin Chu, Andy Fingerhut, Vinh The Lam, Francis Matus, Navindra Yadav, George Varghese
SIGCOMM2
2012 Less Is More: Trading a Little Bandwidth for Ultra-Low Latency in the Data Center
Mohammad Alizadeh, Abdul Kabbani, Tom Edsall, Balaji Prabhakar, Amin Vahdat, Masato Yasuda
NSDI3