This contribution is an extension of our work, which introduced distributed buffer schemes for runtime reconfiguration in adaptive processing architectures, e.g., for streaming media applications. We propose a reconfiguration control protocol and depict results for a reference system implementation. With dynamic reconfiguration, area-cost of field-programmable logic (FPL) can be reduced by reuse, and potential for adaptive signal processing techniques can be enabled. The challenge with runtime reconfiguration is the reconfiguration latency. Given the limitation regarding reconfiguration latency with traditional approaches, we proposed distributed buffer schemes. The simulation results show that our approach enables potential for runtime reconfiguration for adaptive signal processing under real-time constraints. The proposed control protocol enables regular structures for modular based dynamic reconfiguration handling. Finally, we present implementation details and results of an architectural system implementation.

This contribution introduces distributed buffering schemes for runtime reconfiguration in adaptive processing systems, e.g., real-time streaming media applications. With dynamic reconfiguration, the area-cost of field-programmable logic can be reduced by reuse of area resources, and potential for adaptive signal processing techniques can be enabled. The challenge with runtime reconfiguration is the reconfiguration latency. Given the limitations regarding reconfiguration latency with traditional approaches, we propose distributed buffering schemes, to hide latency for fast adaptive systems. To verify our approach, we do analytic and simulative modeling. The results show that our approach can guarantee zero loss-rates and reduce the additional delay (reduction of delay over 65% with estimated application profiles) in cases, where the traditional approach would not reach a desired Quality of Service. Dependent on the worst case application profile, it enables potential for runtime reconfiguration of adaptive signal processing under real-time constraints. Finally, we derive an architecture template with implementation details.

This contribution introduces a distributed dynamic buffering scheme for runtime reconfiguration in adaptive processing architectures, e.g., for streaming media applications. With dynamic reconfiguration, area-cost of field-programmable logic (FPL) can be reduced by reuse and potential for adaptive signal processing techniques can be enabled. The challenge with runtime reconfiguration is the reconfiguration latency. Given the limitations with traditional approaches, we propose a distributed dynamic buffering scheme to hide latency. The simulation results show that our approach enables potential for runtime reconfiguration for adaptive signal processing under real-time constraints. Finally, we derive an architecture template with implementation details of the dynamic buffer scheme.